[v1] amd_iommu: Support Generation of IOMMU XT interrupts

[PATCH 0/3] amd_iommu: Support Generation of IOMMU XT interrupts

Sairaj Kodilkar posted 3 patches 1 week, 2 days ago

Diff against v1
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git fetch https://github.com/patchew-project/qemu tags/patchew/20260129102814.4488-1-sarunkod@amd.com

Maintainers: Alejandro Jimenez <alejandro.j.jimenez@oracle.com>, Sairaj Kodilkar <sarunkod@amd.com>, Paolo Bonzini <pbonzini@redhat.com>, Richard Henderson <richard.henderson@linaro.org>, Eduardo Habkost <eduardo@habkost.net>, "Michael S. Tsirkin" <mst@redhat.com>, Marcel Apfelbaum <marcel.apfelbaum@gmail.com>

hw/i386/amd_iommu.c  | 129 ++++++++++++++++++++++++++++---------------
hw/i386/amd_iommu.h  |  21 ++++++-
hw/i386/trace-events |   1 +
3 files changed, 104 insertions(+), 47 deletions(-)

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[PATCH 0/3] amd_iommu: Support Generation of IOMMU XT interrupts

Posted by Sairaj Kodilkar 1 week, 2 days ago

AMD IOMMU uses MMIO registers 0x170-0x180 to generate the interrupts when guest
has enabled xt support through control register. The guest programs these
registers with appropriate vector and destination ID instead of writing to PCI
MSI capability.

Until now enabling the xt support through command line "xtsup=on" provided
support for 128 bit IRTE. But it has few limitations:

1. It does not consider if guest has actually enabled xt support through MMIO
   control register (0x18). This may cause problems for the guests which do
   not enable this support.
2. The vIOMMU is not capable of generating interrupts using vector and
   destinatio ID in IOMMU x2APIC Control Registers (not supporting event log
   interrupts).

To overcome above limitations, this patch series introduces new internal flag 
"intcapxten" which is set when guest writes "1" to MMIO control register (0x18)
bit 51 (IntCapXTEn) and adds support to generate event log interrupt using
vector and 32 bit destination ID in XT MMIO register 0x170.
-------------------------------------------------------------------------------

Changes since v1:
https://lore.kernel.org/qemu-devel/20251118082403.3455-1-sarunkod@amd.com/t/#m67401571075c42c26cc2560c94c1fc83836c9b20

Patch 1: Return string literals directly instead of copying [AJ]
Patch 2: 
    - Update commit message [AJ]
    - Introduce new subsection for migration compatibility [AJ]
    - Update comment [AJ]
Patch 3: Use ga_enabled flag while setting xten flag [AJ]


-------------------------------------------------------------------------------

The patches are based on top of upstream qemu master (a524ba4ae14)

-------------------------------------------------------------------------------

Sairaj Kodilkar (3):
  amd_iommu: Use switch case to determine mmio register name
  amd_iommu: Turn on XT support only when guest has enabled it
  amd_iommu: Generate XT interrupts when xt support is enabled

 hw/i386/amd_iommu.c  | 129 ++++++++++++++++++++++++++++---------------
 hw/i386/amd_iommu.h  |  21 ++++++-
 hw/i386/trace-events |   1 +
 3 files changed, 104 insertions(+), 47 deletions(-)

-- 
2.34.1