[RFC PATCH 3/3] target/arm: Permit configurations with SME but not SVE

Peter Maydell posted 3 patches 1 week, 6 days ago
Maintainers: Peter Maydell <peter.maydell@linaro.org>
There is a newer version of this series
[RFC PATCH 3/3] target/arm: Permit configurations with SME but not SVE
Posted by Peter Maydell 1 week, 6 days ago
In commit f7767ca30179 ("target/arm: Disable SME if SVE is disabled")
we added code that forces SME to be disabled if SVE is disabled.
This was something we did in the run-up to a release to avoid an
assertion failure in smcr_write() if the user disabled SVE on the
'max' CPU without disabling SME also.

Now that we have corrected the code so that it doesn't assert
in an SME-without-SVE setup, we can let users select it.

This effectively reverts f7767ca30179.

Note that this now means that command lines like
"-cpu max,sve=off" which used to turn off SME and SVE will
now give you a CPU with SME but not SVE. This is permitted
by our loose "max can always give you extra stuff" rules,
but may be unexpected to users.

In particular, gdb crashes when told about a CPU with only
SME via the gdbstub register XML with this error:

 (gdb) target remote :1234
 Remote debugging using :1234
 /build/gdb-1WjiBe/gdb-15.0.50.20240403/gdb/aarch64-tdep.c:3066: internal-error: aarch64_pseudo_register_type: bad register number 160
 A problem internal to GDB has been detected,
 further debugging may prove unreliable.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/cpu.c | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 6e1cbf3d61..1cb30076ad 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1571,16 +1571,6 @@ void arm_cpu_finalize_features(ARMCPU *cpu, Error **errp)
             return;
         }
 
-        /*
-         * FEAT_SME is not architecturally dependent on FEAT_SVE (unless
-         * FEAT_SME_FA64 is present). However our implementation currently
-         * assumes it, so if the user asked for sve=off then turn off SME also.
-         * (KVM doesn't currently support SME at all.)
-         */
-        if (cpu_isar_feature(aa64_sme, cpu) && !cpu_isar_feature(aa64_sve, cpu)) {
-            object_property_set_bool(OBJECT(cpu), "sme", false, &error_abort);
-        }
-
         arm_cpu_sme_finalize(cpu, &local_err);
         if (local_err != NULL) {
             error_propagate(errp, local_err);
-- 
2.43.0
Re: [RFC PATCH 3/3] target/arm: Permit configurations with SME but not SVE
Posted by Richard Henderson 1 week, 5 days ago
On 1/28/26 02:48, Peter Maydell wrote:
> In commit f7767ca30179 ("target/arm: Disable SME if SVE is disabled")
> we added code that forces SME to be disabled if SVE is disabled.
> This was something we did in the run-up to a release to avoid an
> assertion failure in smcr_write() if the user disabled SVE on the
> 'max' CPU without disabling SME also.
> 
> Now that we have corrected the code so that it doesn't assert
> in an SME-without-SVE setup, we can let users select it.
> 
> This effectively reverts f7767ca30179.
> 
> Note that this now means that command lines like
> "-cpu max,sve=off" which used to turn off SME and SVE will
> now give you a CPU with SME but not SVE. This is permitted
> by our loose "max can always give you extra stuff" rules,
> but may be unexpected to users.
> 
> In particular, gdb crashes when told about a CPU with only
> SME via the gdbstub register XML with this error:
> 
>   (gdb) target remote :1234
>   Remote debugging using :1234
>   /build/gdb-1WjiBe/gdb-15.0.50.20240403/gdb/aarch64-tdep.c:3066: internal-error: aarch64_pseudo_register_type: bad register number 160
>   A problem internal to GDB has been detected,
>   further debugging may prove unreliable.
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>   target/arm/cpu.c | 10 ----------
>   1 file changed, 10 deletions(-)
> 
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index 6e1cbf3d61..1cb30076ad 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -1571,16 +1571,6 @@ void arm_cpu_finalize_features(ARMCPU *cpu, Error **errp)
>               return;
>           }
>   
> -        /*
> -         * FEAT_SME is not architecturally dependent on FEAT_SVE (unless
> -         * FEAT_SME_FA64 is present). However our implementation currently
> -         * assumes it, so if the user asked for sve=off then turn off SME also.
> -         * (KVM doesn't currently support SME at all.)
> -         */
> -        if (cpu_isar_feature(aa64_sme, cpu) && !cpu_isar_feature(aa64_sve, cpu)) {
> -            object_property_set_bool(OBJECT(cpu), "sme", false, &error_abort);
> -        }
> -
>           arm_cpu_sme_finalize(cpu, &local_err);
>           if (local_err != NULL) {
>               error_propagate(errp, local_err);

We do need to squash FA64 if sve=off, probably in arm_cpu_sme_finalize, perhaps as a 
previous patch.

Anyway, as far as this goes,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~