hw/riscv: Boot setup improvements

[PATCH 0/4] hw/riscv: Boot setup improvements

Joel Stanley posted 4 patches 1 month ago

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git fetch https://github.com/patchew-project/qemu tags/patchew/20260109131657.396794-1-joel@jms.id.au

Maintainers: Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <dbarboza@ventanamicro.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>, Vijai Kumar K <vijai@behindbytes.com>, Ran Wang <wangran@bosc.ac.cn>

include/hw/riscv/boot.h    | 14 +++++++-
hw/riscv/boot.c            | 73 ++++++++++++++++++++++++++++++++------
hw/riscv/microchip_pfsoc.c |  6 ++--
hw/riscv/opentitan.c       |  6 ++--
hw/riscv/shakti_c.c        |  6 +++-
hw/riscv/sifive_u.c        |  3 +-
hw/riscv/spike.c           |  6 ++--
hw/riscv/virt.c            |  7 ++--
hw/riscv/xiangshan_kmh.c   |  6 +++-
9 files changed, 104 insertions(+), 23 deletions(-)

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[PATCH 0/4] hw/riscv: Boot setup improvements

Posted by Joel Stanley 1 month ago

The first two patches improve the boot infrastructure for riscv so
machines with split memory regions can load payloads into the correct
region. 

The second two patches improve usability when attempting to run opensbi
in less common situations.

This series are prerequisites for the Atlantis machine.

Nicholas Piggin (4):
  hw/riscv/boot: Describe discontiguous memory in boot_info
  hw/riscv/boot: Account for discontiguous memory when loading firmware
  hw/riscv/boot: Warn if a ELF format file is loaded as a binary
  hw/riscv/boot: Provide a simple halting payload

 include/hw/riscv/boot.h    | 14 +++++++-
 hw/riscv/boot.c            | 73 ++++++++++++++++++++++++++++++++------
 hw/riscv/microchip_pfsoc.c |  6 ++--
 hw/riscv/opentitan.c       |  6 ++--
 hw/riscv/shakti_c.c        |  6 +++-
 hw/riscv/sifive_u.c        |  3 +-
 hw/riscv/spike.c           |  6 ++--
 hw/riscv/virt.c            |  7 ++--
 hw/riscv/xiangshan_kmh.c   |  6 +++-
 9 files changed, 104 insertions(+), 23 deletions(-)

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2.47.3