[PATCH 00/29] target/arm: single-binary

Pierrick Bouvier posted 29 patches 1 month ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260109053158.2800705-1-pierrick.bouvier@linaro.org
Maintainers: Richard Henderson <richard.henderson@linaro.org>, Paolo Bonzini <pbonzini@redhat.com>, "Alex Bennée" <alex.bennee@linaro.org>, "Philippe Mathieu-Daudé" <philmd@linaro.org>, Peter Maydell <peter.maydell@linaro.org>, Michael Rolnik <mrolnik@gmail.com>, Brian Cain <brian.cain@oss.qualcomm.com>, Helge Deller <deller@gmx.de>, Zhao Liu <zhao1.liu@intel.com>, Eduardo Habkost <eduardo@habkost.net>, Song Gao <gaosong@loongson.cn>, Laurent Vivier <laurent@vivier.eu>, "Edgar E. Iglesias" <edgar.iglesias@gmail.com>, Aurelien Jarno <aurelien@aurel32.net>, Jiaxun Yang <jiaxun.yang@flygoat.com>, Aleksandar Rikalo <arikalo@gmail.com>, Stafford Horne <shorne@gmail.com>, Nicholas Piggin <npiggin@gmail.com>, Chinmay Rath <rathc@linux.ibm.com>, Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <dbarboza@ventanamicro.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>, Yoshinori Sato <yoshinori.sato@nifty.com>, Ilya Leoshkevich <iii@linux.ibm.com>, David Hildenbrand <david@kernel.org>, Thomas Huth <thuth@redhat.com>, Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>, Artyom Tarasenko <atar4qemu@gmail.com>, Bastian Koppelmann <kbastian@rumtueddeln.de>, Max Filippov <jcmvbkbc@gmail.com>
There is a newer version of this series
include/accel/tcg/tb-cpu-state.h  |  12 ++
include/exec/helper-gen.h         |   6 +
include/exec/helper-proto.h       |   6 +
include/gdbstub/helpers.h         |   9 +-
include/tcg/tcg-op-address-bits.h |  21 +++
include/tcg/tcg-op-gvec.h         |  11 +-
include/tcg/tcg-op.h              |  38 ++---
target/alpha/cpu-param.h          |   2 -
target/arm/cpu-param.h            |   7 -
target/arm/helper.h               |   6 -
target/arm/helper64.h             |   5 +
target/arm/internals.h            |   1 +
target/arm/kvm_arm.h              |   3 +
target/arm/tcg/arm_ldst.h         |  16 ++-
target/arm/tcg/translate-a32.h    |   2 +-
target/arm/tcg/translate.h        |  28 ++--
target/arm/tcg/vec_internal.h     |  49 +++++++
target/avr/cpu-param.h            |   2 -
target/hexagon/cpu-param.h        |   2 -
target/hppa/cpu-param.h           |   2 -
target/i386/cpu-param.h           |   2 -
target/loongarch/cpu-param.h      |   2 -
target/m68k/cpu-param.h           |   2 -
target/microblaze/cpu-param.h     |   2 -
target/mips/cpu-param.h           |   2 -
target/openrisc/cpu-param.h       |   2 -
target/ppc/cpu-param.h            |   2 -
target/riscv/cpu-param.h          |   7 -
target/rx/cpu-param.h             |   2 -
target/s390x/cpu-param.h          |   2 -
target/sh4/cpu-param.h            |   2 -
target/sparc/cpu-param.h          |   2 -
target/tricore/cpu-param.h        |   2 -
target/xtensa/cpu-param.h         |   2 -
accel/tcg/translate-all.c         |  15 +-
target/alpha/translate.c          |   4 +-
target/arm/arm-qmp-cmds.c         |  25 +---
target/arm/cpu32-stubs.c          |  22 +++
target/arm/gdbstub.c              |  61 +-------
target/arm/gdbstub64.c            |  57 ++++++++
target/arm/kvm-stub.c             |   5 +
target/arm/kvm.c                  |  21 +++
target/arm/tcg/gengvec.c          |   3 +-
target/arm/tcg/gengvec64.c        |   1 +
target/arm/tcg/helper-a64.c       |   1 +
target/arm/tcg/hflags.c           |   1 +
target/arm/tcg/mte_helper.c       |   1 +
target/arm/tcg/op_helper.c        |   1 -
target/arm/tcg/pauth_helper.c     |   1 +
target/arm/tcg/psci.c             |   2 +-
target/arm/tcg/sme_helper.c       |   1 +
target/arm/tcg/stubs32.c          |  19 +++
target/arm/tcg/sve_helper.c       |   1 +
target/arm/tcg/translate-a64.c    |  10 +-
target/arm/tcg/translate-m-nocp.c |   2 +
target/arm/tcg/translate-mve.c    |   2 +
target/arm/tcg/translate-neon.c   |   2 +
target/arm/tcg/translate-sme.c    |   1 +
target/arm/tcg/translate-sve.c    |   1 +
target/arm/tcg/translate-vfp.c    |   2 +
target/arm/tcg/translate.c        |  28 ++--
target/arm/tcg/vec_helper.c       | 222 +++---------------------------
target/arm/tcg/vec_helper64.c     | 140 +++++++++++++++++++
target/avr/translate.c            |   2 +-
target/hexagon/translate.c        |   2 +-
target/hppa/translate.c           |   2 +-
target/i386/tcg/translate.c       |   2 +-
target/loongarch/tcg/translate.c  |   2 +-
target/m68k/translate.c           |   2 +-
target/microblaze/translate.c     |   2 +-
target/mips/tcg/translate.c       |   4 +-
target/openrisc/translate.c       |   4 +-
target/ppc/translate.c            |   2 +-
target/riscv/translate.c          |   2 +-
target/rx/translate.c             |   2 +-
target/s390x/tcg/translate.c      |   2 +-
target/sh4/translate.c            |   4 +-
target/sparc/translate.c          |   2 +-
target/tricore/translate.c        |   2 +-
target/xtensa/translate.c         |   2 +-
target/arm/meson.build            |  14 +-
target/arm/tcg/meson.build        |  47 +++++--
82 files changed, 548 insertions(+), 466 deletions(-)
create mode 100644 include/tcg/tcg-op-address-bits.h
create mode 100644 target/arm/helper64.h
create mode 100644 target/arm/tcg/stubs32.c
create mode 100644 target/arm/tcg/vec_helper64.c
[PATCH 00/29] target/arm: single-binary
Posted by Pierrick Bouvier 1 month ago
This series tackles (most of) the rest of target/arm, especially tcg folder.

It requires to add some mechanics in tcg-op.h to be able to specify which target
a file is written for, so every definition becomes unique within a given
compilation unit. In general, and as a note for other architectures,
target/X/tcg/* files should be written for a single variant (32 vs 64 bit) only,
which helps to eradicate TCGv usage.

Initially, I went down the way to have a dynamic definition of TCGv, which
required much more boilerplate and runtime checks. After discussing with
Richard, I realized it was not needed, and that could simply split 32 and 64 bit
properly in different files instead. This might be more tricky with other arch,
but it's definitely the best way to deal with this.

CI: https://github.com/pbo-linaro/qemu/actions/runs/20837738026/job/59872847031
CI: https://gitlab.com/pbo-linaro/qemu/-/pipelines/2252803959

Files left are:
- target/arm/tcg/mve_helper.c
- target/arm/tcg/m_helper.c
- target/arm/tcg/cpu32.c
They will be converted in a future series (more endian usages, and a few more
changes required for cpu32).

Pierrick Bouvier (29):
  include/gdbstub/helpers.h: allow header to be called from common code
  target/arm/gdbstub: extract aarch64_cpu_register_gdb_regs_for_features
  target/arm/gdbstub: make compilation unit common
  target/arm/arm-qmp-cmds.c: make compilation unit common
  include/exec/helper-{gen,proto}.h: add conditional HAS_HELPER64 define
  target/arm: extract helper64.h
  target/arm/tcg/psci.c: make compilation unit common
  target/arm/tcg/cpu-v7m.c: make compilation unit common
  target/arm/tcg/vec_helper.c: make compilation unit common
  target/arm/tcg/translate.h: replace target_ulong with uint64_t
  target/arm/tcg/translate.h: replace target_long with int64_t
  include/tcg/tcg-op.h: replace target_ulong with uint64_t
  include/tcg/tcg-op.h: eradicate TARGET_INSN_START_EXTRA_WORDS
  include/tcg/tcg-op.h: introduce TARGET_ADDRESS_BITS
  accel/tcg/translate-all.c: detect addr_type dynamically
  target/arm/tcg/translate.h: remove TARGET_AARCH64
  target/arm/tcg/translate-vfp.c: make compilation unit common
  target/arm/tcg/translate-neon.c: make compilation unit common
  target/arm/tcg/translate-mve.c: make compilation unit common
  target/arm/tcg/translate-m-nocp.c: make compilation unit common
  target/arm/tcg/op_helper.c: make compilation unit common
  target/arm/tcg/gengvec.c: make compilation unit common
  target/arm/tcg/translate: extract helper64 info in translate-a64
  target/arm/tcg/arm_ldst.h: replace target_ulong with uint64_t
  target/arm/tcg/arm_ldst.h: use translator_ld*_end variants
  target/arm/tcg/translate.c: remove MO_TE usage
  target/arm/tcg/translate.c: replace target_ulong with uint64_t
  target/arm/tcg/translate.c: remove TARGET_AARCH64
  target/arm/tcg/translate.c: make compilation unit common

 include/accel/tcg/tb-cpu-state.h  |  12 ++
 include/exec/helper-gen.h         |   6 +
 include/exec/helper-proto.h       |   6 +
 include/gdbstub/helpers.h         |   9 +-
 include/tcg/tcg-op-address-bits.h |  21 +++
 include/tcg/tcg-op-gvec.h         |  11 +-
 include/tcg/tcg-op.h              |  38 ++---
 target/alpha/cpu-param.h          |   2 -
 target/arm/cpu-param.h            |   7 -
 target/arm/helper.h               |   6 -
 target/arm/helper64.h             |   5 +
 target/arm/internals.h            |   1 +
 target/arm/kvm_arm.h              |   3 +
 target/arm/tcg/arm_ldst.h         |  16 ++-
 target/arm/tcg/translate-a32.h    |   2 +-
 target/arm/tcg/translate.h        |  28 ++--
 target/arm/tcg/vec_internal.h     |  49 +++++++
 target/avr/cpu-param.h            |   2 -
 target/hexagon/cpu-param.h        |   2 -
 target/hppa/cpu-param.h           |   2 -
 target/i386/cpu-param.h           |   2 -
 target/loongarch/cpu-param.h      |   2 -
 target/m68k/cpu-param.h           |   2 -
 target/microblaze/cpu-param.h     |   2 -
 target/mips/cpu-param.h           |   2 -
 target/openrisc/cpu-param.h       |   2 -
 target/ppc/cpu-param.h            |   2 -
 target/riscv/cpu-param.h          |   7 -
 target/rx/cpu-param.h             |   2 -
 target/s390x/cpu-param.h          |   2 -
 target/sh4/cpu-param.h            |   2 -
 target/sparc/cpu-param.h          |   2 -
 target/tricore/cpu-param.h        |   2 -
 target/xtensa/cpu-param.h         |   2 -
 accel/tcg/translate-all.c         |  15 +-
 target/alpha/translate.c          |   4 +-
 target/arm/arm-qmp-cmds.c         |  25 +---
 target/arm/cpu32-stubs.c          |  22 +++
 target/arm/gdbstub.c              |  61 +-------
 target/arm/gdbstub64.c            |  57 ++++++++
 target/arm/kvm-stub.c             |   5 +
 target/arm/kvm.c                  |  21 +++
 target/arm/tcg/gengvec.c          |   3 +-
 target/arm/tcg/gengvec64.c        |   1 +
 target/arm/tcg/helper-a64.c       |   1 +
 target/arm/tcg/hflags.c           |   1 +
 target/arm/tcg/mte_helper.c       |   1 +
 target/arm/tcg/op_helper.c        |   1 -
 target/arm/tcg/pauth_helper.c     |   1 +
 target/arm/tcg/psci.c             |   2 +-
 target/arm/tcg/sme_helper.c       |   1 +
 target/arm/tcg/stubs32.c          |  19 +++
 target/arm/tcg/sve_helper.c       |   1 +
 target/arm/tcg/translate-a64.c    |  10 +-
 target/arm/tcg/translate-m-nocp.c |   2 +
 target/arm/tcg/translate-mve.c    |   2 +
 target/arm/tcg/translate-neon.c   |   2 +
 target/arm/tcg/translate-sme.c    |   1 +
 target/arm/tcg/translate-sve.c    |   1 +
 target/arm/tcg/translate-vfp.c    |   2 +
 target/arm/tcg/translate.c        |  28 ++--
 target/arm/tcg/vec_helper.c       | 222 +++---------------------------
 target/arm/tcg/vec_helper64.c     | 140 +++++++++++++++++++
 target/avr/translate.c            |   2 +-
 target/hexagon/translate.c        |   2 +-
 target/hppa/translate.c           |   2 +-
 target/i386/tcg/translate.c       |   2 +-
 target/loongarch/tcg/translate.c  |   2 +-
 target/m68k/translate.c           |   2 +-
 target/microblaze/translate.c     |   2 +-
 target/mips/tcg/translate.c       |   4 +-
 target/openrisc/translate.c       |   4 +-
 target/ppc/translate.c            |   2 +-
 target/riscv/translate.c          |   2 +-
 target/rx/translate.c             |   2 +-
 target/s390x/tcg/translate.c      |   2 +-
 target/sh4/translate.c            |   4 +-
 target/sparc/translate.c          |   2 +-
 target/tricore/translate.c        |   2 +-
 target/xtensa/translate.c         |   2 +-
 target/arm/meson.build            |  14 +-
 target/arm/tcg/meson.build        |  47 +++++--
 82 files changed, 548 insertions(+), 466 deletions(-)
 create mode 100644 include/tcg/tcg-op-address-bits.h
 create mode 100644 target/arm/helper64.h
 create mode 100644 target/arm/tcg/stubs32.c
 create mode 100644 target/arm/tcg/vec_helper64.c

-- 
2.47.3