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[PATCH v3 3/3] target/i386: Fix FEAT_C000_0001_EDX comment in Yongfeng model

Ewan Hai posted 3 patches 1 month ago
Maintainers: Paolo Bonzini <pbonzini@redhat.com>, Zhao Liu <zhao1.liu@intel.com>
[PATCH v3 3/3] target/i386: Fix FEAT_C000_0001_EDX comment in Yongfeng model
Posted by Ewan Hai 1 month ago 
Update the comment for FEAT_C000_0001_EDX in YongFeng CPU model to
accurately list the missing features instead of the generic TODO message.

As background, current Zhaoxin CPUs implement several CPUID.(EAX=0xC0000001,
ECX=0):EDX feature bits that are not yet defined in the Linux kernel, for
example SM2/SM2_EN, SM3/SM4 and their enable bits, PARALLAX/PARALLAX_EN,
TM3/TM3_EN, RNG2/RNG2_EN, PHE2/PHE2_EN, and RSA/RSA_EN.

We previously tried to upstream all these extra feature bits in one patch
(https://lore.kernel.org/all/20230414095334.8743-1-TonyWWang-oc@zhaoxin.com/),
but the maintainer rejected it because there was no in-tree code using these
features yet. So our current plan is to add the CPUID bits together with real
kernel users step by step, Once full or partial in-tree implementations of
these features are merged, we will update these definitions accordingly and
potentially introduce corresponding support in QEMU.

Signed-off-by: Ewan Hai <ewanhai-oc@zhaoxin.com>
---
 target/i386/cpu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 34e3e66344..10603eeb31 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -6958,8 +6958,8 @@ static const X86CPUDefinition builtin_x86_defs[] = {
             CPUID_EXT3_3DNOWPREFETCH | CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM,
         .features[FEAT_8000_0007_EDX] = CPUID_APM_INVTSC,
         /*
-         * TODO: When the Linux kernel introduces other existing definitions
-         * for this leaf, remember to update the definitions here.
+         * missing: SM2/SM2_EN, CCS/CCS_EN, PARALLAX/PARALLAX_EN,
+         * TM3/TM3_EN, RNG2/RNG2_EN, PHE2/PHE2_EN, RSA/RSA_EN
          */
         .features[FEAT_C000_0001_EDX] =
             CPUID_C000_0001_EDX_PMM_EN | CPUID_C000_0001_EDX_PMM |
-- 
2.34.1
Re: [PATCH v3 3/3] target/i386: Fix FEAT_C000_0001_EDX comment in Yongfeng model
Posted by Paolo Bonzini 2 days, 9 hours ago 
On 1/9/26 03:10, Ewan Hai wrote:
> Update the comment for FEAT_C000_0001_EDX in YongFeng CPU model to
> accurately list the missing features instead of the generic TODO message.
> 
> As background, current Zhaoxin CPUs implement several CPUID.(EAX=0xC0000001,
> ECX=0):EDX feature bits that are not yet defined in the Linux kernel, for
> example SM2/SM2_EN, SM3/SM4 and their enable bits, PARALLAX/PARALLAX_EN,
> TM3/TM3_EN, RNG2/RNG2_EN, PHE2/PHE2_EN, and RSA/RSA_EN.
> 
> We previously tried to upstream all these extra feature bits in one patch
> (https://lore.kernel.org/all/20230414095334.8743-1-TonyWWang-oc@zhaoxin.com/),
> but the maintainer rejected it because there was no in-tree code using these
> features yet. So our current plan is to add the CPUID bits together with real
> kernel users step by step, Once full or partial in-tree implementations of
> these features are merged, we will update these definitions accordingly and
> potentially introduce corresponding support in QEMU.

KVM now has a mechanism for introducing feature bits separately from the 
kernel.  Feel free to resumit using that mechanism, then we can include 
them from the beginning in Shinjidadao.

Thanks,

Paolo
> 
> Signed-off-by: Ewan Hai <ewanhai-oc@zhaoxin.com>
> ---
>   target/i386/cpu.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 34e3e66344..10603eeb31 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -6958,8 +6958,8 @@ static const X86CPUDefinition builtin_x86_defs[] = {
>               CPUID_EXT3_3DNOWPREFETCH | CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM,
>           .features[FEAT_8000_0007_EDX] = CPUID_APM_INVTSC,
>           /*
> -         * TODO: When the Linux kernel introduces other existing definitions
> -         * for this leaf, remember to update the definitions here.
> +         * missing: SM2/SM2_EN, CCS/CCS_EN, PARALLAX/PARALLAX_EN,
> +         * TM3/TM3_EN, RNG2/RNG2_EN, PHE2/PHE2_EN, RSA/RSA_EN
>            */
>           .features[FEAT_C000_0001_EDX] =
>               CPUID_C000_0001_EDX_PMM_EN | CPUID_C000_0001_EDX_PMM |
Re: [PATCH v3 3/3] target/i386: Fix FEAT_C000_0001_EDX comment in Yongfeng model
Posted by Ewan Hai 15 hours ago 
On 2/7/26 9:44 PM, Paolo Bonzini wrote:
> 
> 
> On 1/9/26 03:10, Ewan Hai wrote:
>> Update the comment for FEAT_C000_0001_EDX in YongFeng CPU model to
>> accurately list the missing features instead of the generic TODO message.
>>
>> As background, current Zhaoxin CPUs implement several CPUID.(EAX=0xC0000001,
>> ECX=0):EDX feature bits that are not yet defined in the Linux kernel, for
>> example SM2/SM2_EN, SM3/SM4 and their enable bits, PARALLAX/PARALLAX_EN,
>> TM3/TM3_EN, RNG2/RNG2_EN, PHE2/PHE2_EN, and RSA/RSA_EN.
>>
>> We previously tried to upstream all these extra feature bits in one patch
>> (https://lore.kernel.org/all/20230414095334.8743-1-TonyWWang-oc@zhaoxin.com/),
>> but the maintainer rejected it because there was no in-tree code using these
>> features yet. So our current plan is to add the CPUID bits together with real
>> kernel users step by step, Once full or partial in-tree implementations of
>> these features are merged, we will update these definitions accordingly and
>> potentially introduce corresponding support in QEMU.
> 
> KVM now has a mechanism for introducing feature bits separately from the
> kernel.  Feel free to resumit using that mechanism, then we can include
> them from the beginning in Shinjidadao.
> 
> Thanks,
> 
> Paolo

Hi Paolo,

Thanks for pointing out that KVM has a mechanism for introducing feature bits
independently from the kernel.

Before I start working on the patches, I'd like to clarify a few things:

1. Which specific mechanism are you referring to?
   a) The kvm_only_cpuid_leafs enum + kvm_cpu_cap_init_kvm_defined()?
   b) Or some other approach, given that CPUID_C000_0001_EDX is already
      a kernel-defined leaf (word 5)?

2. Should this independent introduction be limited to CPUID_C000_0001_EDX only
For other feature words, I assume they still need to be handled on a
case-by-case basis depending on their semantics and QEMU support status, correct?

For context: I want to add SM2/SM3/SM4/RNG2/PHE2/RSA etc. bits to
0xC0000001.EDX, but these features don't have in-tree kernel users yet.

Thanks,
Ewan

>> Signed-off-by: Ewan Hai <ewanhai-oc@zhaoxin.com>
>> ---
>>   target/i386/cpu.c | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
>> index 34e3e66344..10603eeb31 100644
>> --- a/target/i386/cpu.c
>> +++ b/target/i386/cpu.c
>> @@ -6958,8 +6958,8 @@ static const X86CPUDefinition builtin_x86_defs[] = {
>>               CPUID_EXT3_3DNOWPREFETCH | CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM,
>>           .features[FEAT_8000_0007_EDX] = CPUID_APM_INVTSC,
>>           /*
>> -         * TODO: When the Linux kernel introduces other existing definitions
>> -         * for this leaf, remember to update the definitions here.
>> +         * missing: SM2/SM2_EN, CCS/CCS_EN, PARALLAX/PARALLAX_EN,
>> +         * TM3/TM3_EN, RNG2/RNG2_EN, PHE2/PHE2_EN, RSA/RSA_EN
>>            */
>>           .features[FEAT_C000_0001_EDX] =
>>               CPUID_C000_0001_EDX_PMM_EN | CPUID_C000_0001_EDX_PMM |
>
Re: [PATCH v3 3/3] target/i386: Fix FEAT_C000_0001_EDX comment in Yongfeng model
Posted by Paolo Bonzini 14 hours ago 
On 2/9/26 09:15, Ewan Hai wrote:
> On 2/7/26 9:44 PM, Paolo Bonzini wrote:
>>
>>
>> On 1/9/26 03:10, Ewan Hai wrote:
>>> Update the comment for FEAT_C000_0001_EDX in YongFeng CPU model to
>>> accurately list the missing features instead of the generic TODO message.
>>>
>>> As background, current Zhaoxin CPUs implement several CPUID.(EAX=0xC0000001,
>>> ECX=0):EDX feature bits that are not yet defined in the Linux kernel, for
>>> example SM2/SM2_EN, SM3/SM4 and their enable bits, PARALLAX/PARALLAX_EN,
>>> TM3/TM3_EN, RNG2/RNG2_EN, PHE2/PHE2_EN, and RSA/RSA_EN.
>>>
>>> We previously tried to upstream all these extra feature bits in one patch
>>> (https://lore.kernel.org/all/20230414095334.8743-1-TonyWWang-oc@zhaoxin.com/),
>>> but the maintainer rejected it because there was no in-tree code using these
>>> features yet. So our current plan is to add the CPUID bits together with real
>>> kernel users step by step, Once full or partial in-tree implementations of
>>> these features are merged, we will update these definitions accordingly and
>>> potentially introduce corresponding support in QEMU.
>>
>> KVM now has a mechanism for introducing feature bits separately from the
>> kernel.  Feel free to resumit using that mechanism, then we can include
>> them from the beginning in Shinjidadao.
>>
>> Thanks,
>>
>> Paolo
> 
> Hi Paolo,
> 
> Thanks for pointing out that KVM has a mechanism for introducing feature bits
> independently from the kernel.
> 
> Before I start working on the patches, I'd like to clarify a few things:
> 
> 1. Which specific mechanism are you referring to?
>     a) The kvm_only_cpuid_leafs enum + kvm_cpu_cap_init_kvm_defined()?
>     b) Or some other approach, given that CPUID_C000_0001_EDX is already
>        a kernel-defined leaf (word 5)?

You can just add X86_FEATURE_* in arch/x86/kvm/reverse_cpuid.h.  For 
example:

/* Intel-defined sub-features, CPUID level 0x00000007:1 (EDX) */
#define X86_FEATURE_AVX_VNNI_INT8       KVM_X86_FEATURE(CPUID_7_1_EDX, 4)
#define X86_FEATURE_AVX_NE_CONVERT      KVM_X86_FEATURE(CPUID_7_1_EDX, 5)
#define X86_FEATURE_AMX_COMPLEX         KVM_X86_FEATURE(CPUID_7_1_EDX, 8)
#define X86_FEATURE_AVX_VNNI_INT16      KVM_X86_FEATURE(CPUID_7_1_EDX, 10)
#define X86_FEATURE_PREFETCHITI         KVM_X86_FEATURE(CPUID_7_1_EDX, 14)
#define X86_FEATURE_AVX10               KVM_X86_FEATURE(CPUID_7_1_EDX, 19)


Paolo

> 2. Should this independent introduction be limited to CPUID_C000_0001_EDX only
> For other feature words, I assume they still need to be handled on a
> case-by-case basis depending on their semantics and QEMU support status, correct?
> 
> For context: I want to add SM2/SM3/SM4/RNG2/PHE2/RSA etc. bits to
> 0xC0000001.EDX, but these features don't have in-tree kernel users yet.
> 
> Thanks,
> Ewan
> 
>>> Signed-off-by: Ewan Hai <ewanhai-oc@zhaoxin.com>
>>> ---
>>>    target/i386/cpu.c | 4 ++--
>>>    1 file changed, 2 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
>>> index 34e3e66344..10603eeb31 100644
>>> --- a/target/i386/cpu.c
>>> +++ b/target/i386/cpu.c
>>> @@ -6958,8 +6958,8 @@ static const X86CPUDefinition builtin_x86_defs[] = {
>>>                CPUID_EXT3_3DNOWPREFETCH | CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM,
>>>            .features[FEAT_8000_0007_EDX] = CPUID_APM_INVTSC,
>>>            /*
>>> -         * TODO: When the Linux kernel introduces other existing definitions
>>> -         * for this leaf, remember to update the definitions here.
>>> +         * missing: SM2/SM2_EN, CCS/CCS_EN, PARALLAX/PARALLAX_EN,
>>> +         * TM3/TM3_EN, RNG2/RNG2_EN, PHE2/PHE2_EN, RSA/RSA_EN
>>>             */
>>>            .features[FEAT_C000_0001_EDX] =
>>>                CPUID_C000_0001_EDX_PMM_EN | CPUID_C000_0001_EDX_PMM |
>>
> 
> 
>
Re: [PATCH v3 3/3] target/i386: Fix FEAT_C000_0001_EDX comment in Yongfeng model
Posted by Ewan Hai 14 hours ago 
On 2/9/26 4:48 PM, Paolo Bonzini wrote:
> 
> 
> On 2/9/26 09:15, Ewan Hai wrote:
>> On 2/7/26 9:44 PM, Paolo Bonzini wrote:
>>>
>>>
>>> On 1/9/26 03:10, Ewan Hai wrote:
>>>> Update the comment for FEAT_C000_0001_EDX in YongFeng CPU model to
>>>> accurately list the missing features instead of the generic TODO message.
>>>>
>>>> As background, current Zhaoxin CPUs implement several CPUID.(EAX=0xC0000001,
>>>> ECX=0):EDX feature bits that are not yet defined in the Linux kernel, for
>>>> example SM2/SM2_EN, SM3/SM4 and their enable bits, PARALLAX/PARALLAX_EN,
>>>> TM3/TM3_EN, RNG2/RNG2_EN, PHE2/PHE2_EN, and RSA/RSA_EN.
>>>>
>>>> We previously tried to upstream all these extra feature bits in one patch
>>>> (https://lore.kernel.org/all/20230414095334.8743-1-TonyWWang-oc@zhaoxin.com/),
>>>> but the maintainer rejected it because there was no in-tree code using these
>>>> features yet. So our current plan is to add the CPUID bits together with real
>>>> kernel users step by step, Once full or partial in-tree implementations of
>>>> these features are merged, we will update these definitions accordingly and
>>>> potentially introduce corresponding support in QEMU.
>>>
>>> KVM now has a mechanism for introducing feature bits separately from the
>>> kernel.  Feel free to resumit using that mechanism, then we can include
>>> them from the beginning in Shinjidadao.
>>>
>>> Thanks,
>>>
>>> Paolo
>>
>> Hi Paolo,
>>
>> Thanks for pointing out that KVM has a mechanism for introducing feature bits
>> independently from the kernel.
>>
>> Before I start working on the patches, I'd like to clarify a few things:
>>
>> 1. Which specific mechanism are you referring to?
>>     a) The kvm_only_cpuid_leafs enum + kvm_cpu_cap_init_kvm_defined()?
>>     b) Or some other approach, given that CPUID_C000_0001_EDX is already
>>        a kernel-defined leaf (word 5)?
> 
> You can just add X86_FEATURE_* in arch/x86/kvm/reverse_cpuid.h.  For
> example:
> 
> /* Intel-defined sub-features, CPUID level 0x00000007:1 (EDX) */
> #define X86_FEATURE_AVX_VNNI_INT8       KVM_X86_FEATURE(CPUID_7_1_EDX, 4)
> #define X86_FEATURE_AVX_NE_CONVERT      KVM_X86_FEATURE(CPUID_7_1_EDX, 5)
> #define X86_FEATURE_AMX_COMPLEX         KVM_X86_FEATURE(CPUID_7_1_EDX, 8)
> #define X86_FEATURE_AVX_VNNI_INT16      KVM_X86_FEATURE(CPUID_7_1_EDX, 10)
> #define X86_FEATURE_PREFETCHITI         KVM_X86_FEATURE(CPUID_7_1_EDX, 14)
> #define X86_FEATURE_AVX10               KVM_X86_FEATURE(CPUID_7_1_EDX, 19)
> 
> 
> Paolo
> 

Got it. Thanks!
Re: [PATCH v3 3/3] target/i386: Fix FEAT_C000_0001_EDX comment in Yongfeng model
Posted by Zhao Liu 2 weeks, 5 days ago 
On Thu, Jan 08, 2026 at 09:10:28PM -0500, Ewan Hai wrote:
> Date: Thu, 8 Jan 2026 21:10:28 -0500
> From: Ewan Hai <ewanhai-oc@zhaoxin.com>
> Subject: [PATCH v3 3/3] target/i386: Fix FEAT_C000_0001_EDX comment in
>  Yongfeng model
> X-Mailer: git-send-email 2.34.1
> 
> Update the comment for FEAT_C000_0001_EDX in YongFeng CPU model to
> accurately list the missing features instead of the generic TODO message.
> 
> As background, current Zhaoxin CPUs implement several CPUID.(EAX=0xC0000001,
> ECX=0):EDX feature bits that are not yet defined in the Linux kernel, for
> example SM2/SM2_EN, SM3/SM4 and their enable bits, PARALLAX/PARALLAX_EN,
> TM3/TM3_EN, RNG2/RNG2_EN, PHE2/PHE2_EN, and RSA/RSA_EN.
> 
> We previously tried to upstream all these extra feature bits in one patch
> (https://lore.kernel.org/all/20230414095334.8743-1-TonyWWang-oc@zhaoxin.com/),
> but the maintainer rejected it because there was no in-tree code using these
> features yet. So our current plan is to add the CPUID bits together with real
> kernel users step by step, Once full or partial in-tree implementations of
> these features are merged, we will update these definitions accordingly and
> potentially introduce corresponding support in QEMU.
> 
> Signed-off-by: Ewan Hai <ewanhai-oc@zhaoxin.com>
> ---
>  target/i386/cpu.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Good cleanup,

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>

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