This were only required for some 32-bit hosts.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/tcg-runtime.h | 3 ---
accel/tcg/atomic_common.c.inc | 20 --------------------
2 files changed, 23 deletions(-)
diff --git a/accel/tcg/tcg-runtime.h b/accel/tcg/tcg-runtime.h
index 698e9baa29..dc89155c0f 100644
--- a/accel/tcg/tcg-runtime.h
+++ b/accel/tcg/tcg-runtime.h
@@ -73,9 +73,6 @@ DEF_HELPER_FLAGS_4(atomic_fetch_oro_le, TCG_CALL_NO_WG,
i128, env, i64, i128, i32)
#endif
-DEF_HELPER_FLAGS_5(nonatomic_cmpxchgo, TCG_CALL_NO_WG,
- i128, env, i64, i128, i128, i32)
-
#ifdef CONFIG_ATOMIC64
#define GEN_ATOMIC_HELPERS(NAME) \
DEF_HELPER_FLAGS_4(glue(glue(atomic_, NAME), b), \
diff --git a/accel/tcg/atomic_common.c.inc b/accel/tcg/atomic_common.c.inc
index bca93a0ac4..1ff80d19fe 100644
--- a/accel/tcg/atomic_common.c.inc
+++ b/accel/tcg/atomic_common.c.inc
@@ -59,26 +59,6 @@ CMPXCHG_HELPER(cmpxchgo_le, Int128)
#undef CMPXCHG_HELPER
-Int128 HELPER(nonatomic_cmpxchgo)(CPUArchState *env, uint64_t addr,
- Int128 cmpv, Int128 newv, uint32_t oi)
-{
-#if TCG_TARGET_REG_BITS == 32
- uintptr_t ra = GETPC();
- Int128 oldv;
-
- oldv = cpu_ld16_mmu(env, addr, oi, ra);
- if (int128_eq(oldv, cmpv)) {
- cpu_st16_mmu(env, addr, newv, oi, ra);
- } else {
- /* Even with comparison failure, still need a write cycle. */
- probe_write(env, addr, 16, get_mmuidx(oi), ra);
- }
- return oldv;
-#else
- g_assert_not_reached();
-#endif
-}
-
#define ATOMIC_HELPER(OP, TYPE) \
TYPE HELPER(glue(atomic_,OP))(CPUArchState *env, uint64_t addr, \
TYPE val, uint32_t oi) \
--
2.43.0