Remove 32-bit host support

[PATCH 15/50] meson: Remove cpu == riscv32 tests

Richard Henderson posted 50 patches 2 days, 5 hours ago

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Maintainers: "Alex Bennée" <alex.bennee@linaro.org>, "Philippe Mathieu-Daudé" <philmd@linaro.org>, Thomas Huth <thuth@redhat.com>, Paolo Bonzini <pbonzini@redhat.com>, Fabiano Rosas <farosas@suse.de>, Laurent Vivier <lvivier@redhat.com>, Richard Henderson <richard.henderson@linaro.org>, Riku Voipio <riku.voipio@iki.fi>, Stefan Hajnoczi <stefanha@redhat.com>, Fam Zheng <fam@euphon.net>, Kevin Wolf <kwolf@redhat.com>, Hanna Reitz <hreitz@redhat.com>, Warner Losh <imp@bsdimp.com>, Kyle Evans <kevans@freebsd.org>, "Daniel P. Berrangé" <berrange@redhat.com>, Stefano Stabellini <sstabellini@kernel.org>, Anthony PERARD <anthony@xenproject.org>, Paul Durrant <paul@xen.org>, "Edgar E. Iglesias" <edgar.iglesias@gmail.com>, "Michael S. Tsirkin" <mst@redhat.com>, David Hildenbrand <david@kernel.org>, "Marc-André Lureau" <marcandre.lureau@redhat.com>, Peter Xu <peterx@redhat.com>, Li Zhijian <lizhijian@fujitsu.com>, Hyman Huang <yong.huang@smartx.com>, Peter Maydell <peter.maydell@linaro.org>, Helge Deller <deller@gmx.de>, Zhao Liu <zhao1.liu@intel.com>, Eduardo Habkost <eduardo@habkost.net>, Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <dbarboza@ventanamicro.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>, Ilya Leoshkevich <iii@linux.ibm.com>, WANG Xuerui <git@xen0n.name>, Stefan Weil <sw@weilnetz.de>

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[PATCH 15/50] meson: Remove cpu == riscv32 tests

Posted by Richard Henderson 2 days, 5 hours ago

The 32-bit riscv host is no longer supported.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 configure   | 10 +++-------
 meson.build |  4 +---
 2 files changed, 4 insertions(+), 10 deletions(-)

diff --git a/configure b/configure
index 2d9a603ee8..06a1b441ff 100755
--- a/configure
+++ b/configure
@@ -403,12 +403,8 @@ elif check_define __s390__ ; then
   else
     cpu="s390"
   fi
-elif check_define __riscv ; then
-  if check_define _LP64 ; then
-    cpu="riscv64"
-  else
-    cpu="riscv32"
-  fi
+elif check_define __riscv && check_define _LP64 ; then
+  cpu="riscv64"
 elif check_define __aarch64__ ; then
   cpu="aarch64"
 elif check_define __loongarch64 ; then
@@ -1269,7 +1265,7 @@ EOF
     test "$bigendian" = no && rust_arch=${rust_arch}el
     ;;
 
-  riscv32|riscv64)
+  riscv64)
     # e.g. riscv64gc-unknown-linux-gnu, but riscv64-linux-android
     test "$android" = no && rust_arch=${rust_arch}gc
     ;;
diff --git a/meson.build b/meson.build
index b0fe798ee2..a18b3a5657 100644
--- a/meson.build
+++ b/meson.build
@@ -50,7 +50,7 @@ qapi_trace_events = []
 
 bsd_oses = ['gnu/kfreebsd', 'freebsd', 'netbsd', 'openbsd', 'dragonfly', 'darwin']
 supported_oses = ['windows', 'freebsd', 'netbsd', 'openbsd', 'darwin', 'sunos', 'linux', 'emscripten']
-supported_cpus = ['ppc64', 's390x', 'riscv32', 'riscv64', 'x86_64',
+supported_cpus = ['ppc64', 's390x', 'riscv64', 'x86_64',
   'aarch64', 'loongarch64', 'mips64', 'sparc64', 'wasm32']
 
 cpu = host_machine.cpu_family()
@@ -279,8 +279,6 @@ elif cpu == 'ppc64'
   kvm_targets = ['ppc-softmmu', 'ppc64-softmmu']
 elif cpu == 'mips64'
   kvm_targets = ['mips-softmmu', 'mipsel-softmmu', 'mips64-softmmu', 'mips64el-softmmu']
-elif cpu == 'riscv32'
-  kvm_targets = ['riscv32-softmmu']
 elif cpu == 'riscv64'
   kvm_targets = ['riscv64-softmmu']
 elif cpu == 'loongarch64'
-- 
2.43.0

Re: [PATCH 15/50] meson: Remove cpu == riscv32 tests

Posted by Pierrick Bouvier 1 day, 14 hours ago

On 1/7/26 9:29 PM, Richard Henderson wrote:
> The 32-bit riscv host is no longer supported.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   configure   | 10 +++-------
>   meson.build |  4 +---
>   2 files changed, 4 insertions(+), 10 deletions(-)
> 

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>

Re: [PATCH 15/50] meson: Remove cpu == riscv32 tests

Posted by Thomas Huth 1 day, 23 hours ago

On 08/01/2026 06.29, Richard Henderson wrote:
> The 32-bit riscv host is no longer supported.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   configure   | 10 +++-------
>   meson.build |  4 +---
>   2 files changed, 4 insertions(+), 10 deletions(-)
> 
> diff --git a/configure b/configure
> index 2d9a603ee8..06a1b441ff 100755
> --- a/configure
> +++ b/configure
> @@ -403,12 +403,8 @@ elif check_define __s390__ ; then
>     else
>       cpu="s390"
>     fi
> -elif check_define __riscv ; then
> -  if check_define _LP64 ; then
> -    cpu="riscv64"
> -  else
> -    cpu="riscv32"
> -  fi
> +elif check_define __riscv && check_define _LP64 ; then
> +  cpu="riscv64"
>   elif check_define __aarch64__ ; then
>     cpu="aarch64"
>   elif check_define __loongarch64 ; then
> @@ -1269,7 +1265,7 @@ EOF
>       test "$bigendian" = no && rust_arch=${rust_arch}el
>       ;;
>   
> -  riscv32|riscv64)
> +  riscv64)
>       # e.g. riscv64gc-unknown-linux-gnu, but riscv64-linux-android
>       test "$android" = no && rust_arch=${rust_arch}gc
>       ;;
> diff --git a/meson.build b/meson.build
> index b0fe798ee2..a18b3a5657 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -50,7 +50,7 @@ qapi_trace_events = []
>   
>   bsd_oses = ['gnu/kfreebsd', 'freebsd', 'netbsd', 'openbsd', 'dragonfly', 'darwin']
>   supported_oses = ['windows', 'freebsd', 'netbsd', 'openbsd', 'darwin', 'sunos', 'linux', 'emscripten']
> -supported_cpus = ['ppc64', 's390x', 'riscv32', 'riscv64', 'x86_64',
> +supported_cpus = ['ppc64', 's390x', 'riscv64', 'x86_64',
>     'aarch64', 'loongarch64', 'mips64', 'sparc64', 'wasm32']
>   
>   cpu = host_machine.cpu_family()
> @@ -279,8 +279,6 @@ elif cpu == 'ppc64'
>     kvm_targets = ['ppc-softmmu', 'ppc64-softmmu']
>   elif cpu == 'mips64'
>     kvm_targets = ['mips-softmmu', 'mipsel-softmmu', 'mips64-softmmu', 'mips64el-softmmu']
> -elif cpu == 'riscv32'
> -  kvm_targets = ['riscv32-softmmu']
>   elif cpu == 'riscv64'
>     kvm_targets = ['riscv64-softmmu']
>   elif cpu == 'loongarch64'

Reviewed-by: Thomas Huth <thuth@redhat.com>