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[PATCH 14/50] meson: Drop host_arch rename for riscv64

Richard Henderson posted 50 patches 2 days, 5 hours ago
Maintainers: "Alex Bennée" <alex.bennee@linaro.org>, "Philippe Mathieu-Daudé" <philmd@linaro.org>, Thomas Huth <thuth@redhat.com>, Paolo Bonzini <pbonzini@redhat.com>, Fabiano Rosas <farosas@suse.de>, Laurent Vivier <lvivier@redhat.com>, Richard Henderson <richard.henderson@linaro.org>, Riku Voipio <riku.voipio@iki.fi>, Stefan Hajnoczi <stefanha@redhat.com>, Fam Zheng <fam@euphon.net>, Kevin Wolf <kwolf@redhat.com>, Hanna Reitz <hreitz@redhat.com>, Warner Losh <imp@bsdimp.com>, Kyle Evans <kevans@freebsd.org>, "Daniel P. Berrangé" <berrange@redhat.com>, Stefano Stabellini <sstabellini@kernel.org>, Anthony PERARD <anthony@xenproject.org>, Paul Durrant <paul@xen.org>, "Edgar E. Iglesias" <edgar.iglesias@gmail.com>, "Michael S. Tsirkin" <mst@redhat.com>, David Hildenbrand <david@kernel.org>, "Marc-André Lureau" <marcandre.lureau@redhat.com>, Peter Xu <peterx@redhat.com>, Li Zhijian <lizhijian@fujitsu.com>, Hyman Huang <yong.huang@smartx.com>, Peter Maydell <peter.maydell@linaro.org>, Helge Deller <deller@gmx.de>, Zhao Liu <zhao1.liu@intel.com>, Eduardo Habkost <eduardo@habkost.net>, Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <dbarboza@ventanamicro.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>, Ilya Leoshkevich <iii@linux.ibm.com>, WANG Xuerui <git@xen0n.name>, Stefan Weil <sw@weilnetz.de>
[PATCH 14/50] meson: Drop host_arch rename for riscv64
Posted by Richard Henderson 2 days, 5 hours ago 
This requires renaming several directories:
tcg/riscv, linux-user/include/host/riscv, and
common-user/host/riscv.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 host/include/{riscv => riscv64}/host/cpuinfo.h           | 0
 linux-user/include/host/{riscv => riscv64}/host-signal.h | 0
 tcg/{riscv => riscv64}/tcg-target-con-set.h              | 0
 tcg/{riscv => riscv64}/tcg-target-con-str.h              | 0
 tcg/{riscv => riscv64}/tcg-target-has.h                  | 0
 tcg/{riscv => riscv64}/tcg-target-mo.h                   | 0
 tcg/{riscv => riscv64}/tcg-target-reg-bits.h             | 0
 tcg/{riscv => riscv64}/tcg-target.h                      | 0
 MAINTAINERS                                              | 2 +-
 common-user/host/{riscv => riscv64}/safe-syscall.inc.S   | 0
 configure                                                | 4 ++--
 meson.build                                              | 2 --
 tcg/{riscv => riscv64}/tcg-target-opc.h.inc              | 0
 tcg/{riscv => riscv64}/tcg-target.c.inc                  | 0
 14 files changed, 3 insertions(+), 5 deletions(-)
 rename host/include/{riscv => riscv64}/host/cpuinfo.h (100%)
 rename linux-user/include/host/{riscv => riscv64}/host-signal.h (100%)
 rename tcg/{riscv => riscv64}/tcg-target-con-set.h (100%)
 rename tcg/{riscv => riscv64}/tcg-target-con-str.h (100%)
 rename tcg/{riscv => riscv64}/tcg-target-has.h (100%)
 rename tcg/{riscv => riscv64}/tcg-target-mo.h (100%)
 rename tcg/{riscv => riscv64}/tcg-target-reg-bits.h (100%)
 rename tcg/{riscv => riscv64}/tcg-target.h (100%)
 rename common-user/host/{riscv => riscv64}/safe-syscall.inc.S (100%)
 rename tcg/{riscv => riscv64}/tcg-target-opc.h.inc (100%)
 rename tcg/{riscv => riscv64}/tcg-target.c.inc (100%)

diff --git a/host/include/riscv/host/cpuinfo.h b/host/include/riscv64/host/cpuinfo.h
similarity index 100%
rename from host/include/riscv/host/cpuinfo.h
rename to host/include/riscv64/host/cpuinfo.h
diff --git a/linux-user/include/host/riscv/host-signal.h b/linux-user/include/host/riscv64/host-signal.h
similarity index 100%
rename from linux-user/include/host/riscv/host-signal.h
rename to linux-user/include/host/riscv64/host-signal.h
diff --git a/tcg/riscv/tcg-target-con-set.h b/tcg/riscv64/tcg-target-con-set.h
similarity index 100%
rename from tcg/riscv/tcg-target-con-set.h
rename to tcg/riscv64/tcg-target-con-set.h
diff --git a/tcg/riscv/tcg-target-con-str.h b/tcg/riscv64/tcg-target-con-str.h
similarity index 100%
rename from tcg/riscv/tcg-target-con-str.h
rename to tcg/riscv64/tcg-target-con-str.h
diff --git a/tcg/riscv/tcg-target-has.h b/tcg/riscv64/tcg-target-has.h
similarity index 100%
rename from tcg/riscv/tcg-target-has.h
rename to tcg/riscv64/tcg-target-has.h
diff --git a/tcg/riscv/tcg-target-mo.h b/tcg/riscv64/tcg-target-mo.h
similarity index 100%
rename from tcg/riscv/tcg-target-mo.h
rename to tcg/riscv64/tcg-target-mo.h
diff --git a/tcg/riscv/tcg-target-reg-bits.h b/tcg/riscv64/tcg-target-reg-bits.h
similarity index 100%
rename from tcg/riscv/tcg-target-reg-bits.h
rename to tcg/riscv64/tcg-target-reg-bits.h
diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv64/tcg-target.h
similarity index 100%
rename from tcg/riscv/tcg-target.h
rename to tcg/riscv64/tcg-target.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 4a79947ba3..2b9354757e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4054,7 +4054,7 @@ M: Palmer Dabbelt <palmer@dabbelt.com>
 M: Alistair Francis <Alistair.Francis@wdc.com>
 L: qemu-riscv@nongnu.org
 S: Maintained
-F: tcg/riscv/
+F: tcg/riscv64/
 F: disas/riscv.[ch]
 
 S390 TCG target
diff --git a/common-user/host/riscv/safe-syscall.inc.S b/common-user/host/riscv64/safe-syscall.inc.S
similarity index 100%
rename from common-user/host/riscv/safe-syscall.inc.S
rename to common-user/host/riscv64/safe-syscall.inc.S
diff --git a/configure b/configure
index fab9a45531..2d9a603ee8 100755
--- a/configure
+++ b/configure
@@ -462,8 +462,8 @@ case "$cpu" in
     CPU_CFLAGS="-m64 -mlittle-endian"
     ;;
 
-  riscv32 | riscv64)
-    host_arch=riscv
+  riscv64)
+    host_arch=riscv64
     linux_arch=riscv
     ;;
 
diff --git a/meson.build b/meson.build
index 6896c7a64f..b0fe798ee2 100644
--- a/meson.build
+++ b/meson.build
@@ -265,8 +265,6 @@ enable_modules = get_option('modules') \
 
 if cpu not in supported_cpus
   host_arch = 'unknown'
-elif cpu in ['riscv32', 'riscv64']
-  host_arch = 'riscv'
 else
   host_arch = cpu
 endif
diff --git a/tcg/riscv/tcg-target-opc.h.inc b/tcg/riscv64/tcg-target-opc.h.inc
similarity index 100%
rename from tcg/riscv/tcg-target-opc.h.inc
rename to tcg/riscv64/tcg-target-opc.h.inc
diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv64/tcg-target.c.inc
similarity index 100%
rename from tcg/riscv/tcg-target.c.inc
rename to tcg/riscv64/tcg-target.c.inc
-- 
2.43.0
Re: [PATCH 14/50] meson: Drop host_arch rename for riscv64
Posted by Pierrick Bouvier 1 day, 14 hours ago 
On 1/7/26 9:29 PM, Richard Henderson wrote:
> This requires renaming several directories:
> tcg/riscv, linux-user/include/host/riscv, and
> common-user/host/riscv.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   host/include/{riscv => riscv64}/host/cpuinfo.h           | 0
>   linux-user/include/host/{riscv => riscv64}/host-signal.h | 0
>   tcg/{riscv => riscv64}/tcg-target-con-set.h              | 0
>   tcg/{riscv => riscv64}/tcg-target-con-str.h              | 0
>   tcg/{riscv => riscv64}/tcg-target-has.h                  | 0
>   tcg/{riscv => riscv64}/tcg-target-mo.h                   | 0
>   tcg/{riscv => riscv64}/tcg-target-reg-bits.h             | 0
>   tcg/{riscv => riscv64}/tcg-target.h                      | 0
>   MAINTAINERS                                              | 2 +-
>   common-user/host/{riscv => riscv64}/safe-syscall.inc.S   | 0
>   configure                                                | 4 ++--
>   meson.build                                              | 2 --
>   tcg/{riscv => riscv64}/tcg-target-opc.h.inc              | 0
>   tcg/{riscv => riscv64}/tcg-target.c.inc                  | 0
>   14 files changed, 3 insertions(+), 5 deletions(-)
>   rename host/include/{riscv => riscv64}/host/cpuinfo.h (100%)
>   rename linux-user/include/host/{riscv => riscv64}/host-signal.h (100%)
>   rename tcg/{riscv => riscv64}/tcg-target-con-set.h (100%)
>   rename tcg/{riscv => riscv64}/tcg-target-con-str.h (100%)
>   rename tcg/{riscv => riscv64}/tcg-target-has.h (100%)
>   rename tcg/{riscv => riscv64}/tcg-target-mo.h (100%)
>   rename tcg/{riscv => riscv64}/tcg-target-reg-bits.h (100%)
>   rename tcg/{riscv => riscv64}/tcg-target.h (100%)
>   rename common-user/host/{riscv => riscv64}/safe-syscall.inc.S (100%)
>   rename tcg/{riscv => riscv64}/tcg-target-opc.h.inc (100%)
>   rename tcg/{riscv => riscv64}/tcg-target.c.inc (100%)
> 

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Re: [PATCH 14/50] meson: Drop host_arch rename for riscv64
Posted by Philippe Mathieu-Daudé 2 days ago 
On 8/1/26 06:29, Richard Henderson wrote:
> This requires renaming several directories:
> tcg/riscv, linux-user/include/host/riscv, and
> common-user/host/riscv.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   host/include/{riscv => riscv64}/host/cpuinfo.h           | 0
>   linux-user/include/host/{riscv => riscv64}/host-signal.h | 0
>   tcg/{riscv => riscv64}/tcg-target-con-set.h              | 0
>   tcg/{riscv => riscv64}/tcg-target-con-str.h              | 0
>   tcg/{riscv => riscv64}/tcg-target-has.h                  | 0
>   tcg/{riscv => riscv64}/tcg-target-mo.h                   | 0
>   tcg/{riscv => riscv64}/tcg-target-reg-bits.h             | 0
>   tcg/{riscv => riscv64}/tcg-target.h                      | 0
>   MAINTAINERS                                              | 2 +-
>   common-user/host/{riscv => riscv64}/safe-syscall.inc.S   | 0
>   configure                                                | 4 ++--
>   meson.build                                              | 2 --
>   tcg/{riscv => riscv64}/tcg-target-opc.h.inc              | 0
>   tcg/{riscv => riscv64}/tcg-target.c.inc                  | 0
>   14 files changed, 3 insertions(+), 5 deletions(-)
>   rename host/include/{riscv => riscv64}/host/cpuinfo.h (100%)
>   rename linux-user/include/host/{riscv => riscv64}/host-signal.h (100%)
>   rename tcg/{riscv => riscv64}/tcg-target-con-set.h (100%)
>   rename tcg/{riscv => riscv64}/tcg-target-con-str.h (100%)
>   rename tcg/{riscv => riscv64}/tcg-target-has.h (100%)
>   rename tcg/{riscv => riscv64}/tcg-target-mo.h (100%)
>   rename tcg/{riscv => riscv64}/tcg-target-reg-bits.h (100%)
>   rename tcg/{riscv => riscv64}/tcg-target.h (100%)
>   rename common-user/host/{riscv => riscv64}/safe-syscall.inc.S (100%)
>   rename tcg/{riscv => riscv64}/tcg-target-opc.h.inc (100%)
>   rename tcg/{riscv => riscv64}/tcg-target.c.inc (100%)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Patchew 2.1-devel-b67e4c2

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