[PATCH] target/riscv/cpu.c: enable PMP by default for profile CPUs

Daniel Henrique Barboza posted 1 patch 1 month ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20260106205152.3654975-1-daniel.barboza@oss.qualcomm.com
Maintainers: Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <dbarboza@ventanamicro.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
target/riscv/cpu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
[PATCH] target/riscv/cpu.c: enable PMP by default for profile CPUs
Posted by Daniel Henrique Barboza 1 month ago
The new OpenSBI v1.8 release is not happy about PMP being disabled in
the profile CPUs [1], showing a:

init_coldboot: hart isolation configure failed (error -3)

error when booting. It seems benign given that it doesn't affect
anything else during boot, but still a rather unpleasant message.

We do not have RISC-V profiles that mandates PMP to be enabled. That
said, most of our other CPUs enables PMP by default. Setting it to 'on'
for profile CPUs allows for a more standard experience between CPUs. And
it's not like enabling PMP will bring any additional extensions to the
CPU either, meaning that we can still claim a certain level of design
purity for our profile CPUs.

[1] https://lists.infradead.org/pipermail/opensbi/2026-January/009307.html

Reported-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reported-by: Anup Patel <anup.patel@oss.qualcomm.com>
Signed-off-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
---
 target/riscv/cpu.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index ffd98e8eed..a26e547a38 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -2955,7 +2955,8 @@ void riscv_isa_write_fdt(RISCVCPU *cpu, void *fdt, char *nodename)
 
 #define DEFINE_PROFILE_CPU(type_name, parent_type_name, profile_)    \
     DEFINE_RISCV_CPU(type_name, parent_type_name,             \
-        .profile = &(profile_))
+        .profile = &(profile_), \
+        .cfg.pmp = true)
 
 static const TypeInfo riscv_cpu_type_infos[] = {
     {
-- 
2.51.1
Re: [PATCH] target/riscv/cpu.c: enable PMP by default for profile CPUs
Posted by Daniel Henrique Barboza 4 weeks, 1 day ago
Hi,

Please discard this patch. OpenSBI 1.8.1 found a way to go around the 
issue of a CPU not having PMP enabled.


Thanks,

Daniel

On 1/6/2026 5:51 PM, Daniel Henrique Barboza wrote:
> The new OpenSBI v1.8 release is not happy about PMP being disabled in
> the profile CPUs [1], showing a:
> 
> init_coldboot: hart isolation configure failed (error -3)
> 
> error when booting. It seems benign given that it doesn't affect
> anything else during boot, but still a rather unpleasant message.
> 
> We do not have RISC-V profiles that mandates PMP to be enabled. That
> said, most of our other CPUs enables PMP by default. Setting it to 'on'
> for profile CPUs allows for a more standard experience between CPUs. And
> it's not like enabling PMP will bring any additional extensions to the
> CPU either, meaning that we can still claim a certain level of design
> purity for our profile CPUs.
> 
> [1] https://lists.infradead.org/pipermail/opensbi/2026-January/009307.html
> 
> Reported-by: Thomas Perrot <thomas.perrot@bootlin.com>
> Reported-by: Anup Patel <anup.patel@oss.qualcomm.com>
> Signed-off-by: Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>
> ---
>   target/riscv/cpu.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index ffd98e8eed..a26e547a38 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -2955,7 +2955,8 @@ void riscv_isa_write_fdt(RISCVCPU *cpu, void *fdt, char *nodename)
>   
>   #define DEFINE_PROFILE_CPU(type_name, parent_type_name, profile_)    \
>       DEFINE_RISCV_CPU(type_name, parent_type_name,             \
> -        .profile = &(profile_))
> +        .profile = &(profile_), \
> +        .cfg.pmp = true)
>   
>   static const TypeInfo riscv_cpu_type_infos[] = {
>       {