Add two functions one of which finds the lowest cache level defined in
the cache description input, and the other checks if a given cache
topology is defined at a particular cache level
Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>
---
hw/core/machine-smp.c | 52 ++++++++++++++++++++++++++++++++++++++++
include/hw/core/boards.h | 5 ++++
2 files changed, 57 insertions(+)
diff --git a/hw/core/machine-smp.c b/hw/core/machine-smp.c
index 189c70015f..bef04aa2d7 100644
--- a/hw/core/machine-smp.c
+++ b/hw/core/machine-smp.c
@@ -406,3 +406,55 @@ bool machine_check_smp_cache(const MachineState *ms, Error **errp)
return true;
}
+
+/*
+ * This function assumes L3 and L2 have unified cache and L1 is split L1d and
+ * L1i.
+ */
+bool machine_find_lowest_level_cache_at_topo_level(const MachineState *ms,
+ int *lowest_cache_level,
+ CpuTopologyLevel topo_level)
+{
+ enum CacheLevelAndType cache_level;
+ enum CpuTopologyLevel t;
+
+ for (cache_level = CACHE_LEVEL_AND_TYPE_L1D;
+ cache_level < CACHE_LEVEL_AND_TYPE__MAX; cache_level++) {
+ t = machine_get_cache_topo_level(ms, cache_level);
+ if (t == topo_level) {
+ /* Assume L1 is split into L1d and L1i caches. */
+ if (cache_level == CACHE_LEVEL_AND_TYPE_L1D ||
+ cache_level == CACHE_LEVEL_AND_TYPE_L1I) {
+ *lowest_cache_level = 1; /* L1 */
+ } else {
+ /* Assume the other caches are unified. */
+ *lowest_cache_level = cache_level;
+ }
+
+ return true;
+ }
+ }
+
+ return false;
+}
+
+/*
+ * Check if there are caches defined at a particular level. It supports only
+ * L1, L2 and L3 caches, but this can be extended to more levels as needed.
+ *
+ * Return True on success, False otherwise.
+ */
+bool machine_defines_cache_at_topo_level(const MachineState *ms,
+ CpuTopologyLevel topology)
+{
+ enum CacheLevelAndType cache_level;
+
+ for (cache_level = CACHE_LEVEL_AND_TYPE_L1D;
+ cache_level < CACHE_LEVEL_AND_TYPE__MAX; cache_level++) {
+ if (machine_get_cache_topo_level(ms, cache_level) == topology) {
+ return true;
+ }
+ }
+
+ return false;
+}
diff --git a/include/hw/core/boards.h b/include/hw/core/boards.h
index 815845207b..55093ebd93 100644
--- a/include/hw/core/boards.h
+++ b/include/hw/core/boards.h
@@ -60,6 +60,11 @@ void machine_set_cache_topo_level(MachineState *ms, CacheLevelAndType cache,
CpuTopologyLevel level);
bool machine_check_smp_cache(const MachineState *ms, Error **errp);
void machine_memory_devices_init(MachineState *ms, hwaddr base, uint64_t size);
+bool machine_defines_cache_at_topo_level(const MachineState *ms,
+ CpuTopologyLevel level);
+bool machine_find_lowest_level_cache_at_topo_level(const MachineState *ms,
+ int *level_found,
+ CpuTopologyLevel topo_level);
/**
* machine_class_allow_dynamic_sysbus_dev: Add type to list of valid devices
--
2.43.0