MAINTAINERS | 6 +
accel/hvf/hvf-all.c | 7 +-
accel/meson.build | 1 +
accel/stubs/whpx-stub.c | 1 +
accel/whpx/meson.build | 7 +
{target/i386 => accel}/whpx/whpx-accel-ops.c | 6 +-
accel/whpx/whpx-common.c | 536 +++++++++
docs/system/arm/virt.rst | 13 +-
hw/arm/virt-acpi-build.c | 16 +-
hw/arm/virt.c | 140 ++-
hw/i386/x86-cpu.c | 4 +-
hw/intc/arm_gicv3_common.c | 3 +
hw/intc/arm_gicv3_whpx.c | 249 ++++
hw/intc/meson.build | 1 +
include/hw/arm/virt.h | 8 +-
include/hw/core/boards.h | 3 +-
include/hw/intc/arm_gicv3_common.h | 3 +
include/system/hvf_int.h | 5 +
include/system/hw_accel.h | 13 +
.../whpx => include/system}/whpx-accel-ops.h | 4 +-
include/system/whpx-all.h | 20 +
include/system/whpx-common.h | 26 +
.../whpx => include/system}/whpx-internal.h | 25 +-
include/system/whpx.h | 5 +-
meson.build | 20 +-
target/arm/cpu.c | 3 +
target/arm/cpu64.c | 17 +-
target/arm/hvf-stub.c | 20 -
target/arm/hvf/hvf.c | 6 +-
target/arm/hvf_arm.h | 3 -
target/arm/kvm-consts.h | 2 +
target/arm/meson.build | 2 +-
target/arm/whpx/meson.build | 5 +
target/arm/whpx/whpx-all.c | 1020 +++++++++++++++++
target/arm/whpx/whpx-stub.c | 15 +
target/arm/whpx_arm.h | 17 +
target/i386/cpu-apic.c | 2 +-
target/i386/hvf/hvf.c | 11 +
target/i386/whpx/meson.build | 1 -
target/i386/whpx/whpx-all.c | 569 +--------
target/i386/whpx/whpx-apic.c | 48 +-
tests/data/acpi/aarch64/virt/APIC.its_off | Bin 164 -> 188 bytes
42 files changed, 2215 insertions(+), 648 deletions(-)
create mode 100644 accel/whpx/meson.build
rename {target/i386 => accel}/whpx/whpx-accel-ops.c (96%)
create mode 100644 accel/whpx/whpx-common.c
create mode 100644 hw/intc/arm_gicv3_whpx.c
rename {target/i386/whpx => include/system}/whpx-accel-ops.h (92%)
create mode 100644 include/system/whpx-all.h
create mode 100644 include/system/whpx-common.h
rename {target/i386/whpx => include/system}/whpx-internal.h (88%)
delete mode 100644 target/arm/hvf-stub.c
create mode 100644 target/arm/whpx/meson.build
create mode 100644 target/arm/whpx/whpx-all.c
create mode 100644 target/arm/whpx/whpx-stub.c
create mode 100644 target/arm/whpx_arm.h
Link to branch: https://github.com/mediouni-m/qemu whpx (tag for this submission: whpx-v13)
Missing features:
- VM save-restore: interrupt controller state notably
- SVE register sync: I didn't have the time to test this on pre-release hardware with SVE2 support yet.
So SVE2 is currently masked for VMs when running this.
Known bugs:
- U-Boot still doesn't work (hangs when trying to parse firmware) but EDK2 does.
Note:
"target/arm/kvm: add constants for new PSCI versions" taken from the mailing list.
"accel/system: Introduce hwaccel_enabled() helper" taken from the mailing list, added here
as part of this series to make it compilable as a whole.
"hw/arm: virt: add GICv2m for the case when ITS is not available" present in both the HVF
vGIC and this series.
"hw: arm: virt-acpi-build: add temporary hack to match existing behavior" is
for ACPI stability but what is the right approach to follow there?
And another note:
Seems that unlike HVF there isn't direct correspondence between WHv registers and the actual register layout,
so didn't do changes there to a sysreg.inc.
Updates since v12:
- Address review comments and make sure that checkpatch shows no errors, make test also ran
- Tested the Windows x86_64 build too in addition to Windows arm64 and macOS arm64
- Hopefully the last revision, should be ready to merge.
Updates since v11:
- Address review comments
- Rebase up to latest staging
- Switch to assuming Qemu 11.0 as the newest machine model
Updates since v10:
- Bring forward to latest Qemu
- Fix a typo in the GICv3+GICv2m PR
Updates since v9:
- Adding partition reset on the reboot side of things...
Updates since v8:
- v9 and v8 were not submitted properly because of my MTA not behaving, sorry for that.
- v10 introduces a new argument, -M msi=, to handle MSI-X configuration more granularly.
- That surfaced what I think is a bug (?), with vms->its=1 on GICv2 configurations... or I did understand everything wrong.
- Oopsie due to email provider ratelimiting.
Updates since v7:
- Oops, fixing bug in "hw/arm: virt: cleanly fail on attempt to use the platform vGIC together with ITS".
Other commits are unchanged.
Updates since v6:
- Rebasing
- Fixing a bug in the GICv3+GICv2m case for ACPI table generation
- getting rid of the slots infrastructure for memory management
- Place the docs commit right after the "cleanly fail on attempt to run GICv3+GICv2m on an unsupported config" one
as that's what switches ITS to a tristate.
- Fixing a build issue when getting rid of the arch-specific arm64 hvf-stub.
Updates since v5:
- Rebasing
- Address review comments
- Rework ITS enablement to a tristate
- On x86: move away from deprecated APIs to get/set APIC state
Updates since v4:
- Taking into account review comments
- Add migration blocker in the vGICv3 code due to missing interrupt controller save/restore
- Debug register sync
Updates since v3:
- Disabling SVE on WHPX
- Taking into account review comments incl:
- fixing x86 support
- reduce the amount of __x86_64__ checks in common code to the minimum (winhvemulation)
which can be reduced even further down the road.
- generalize get_physical_address_range into something common between hvf and whpx
Updates since v2:
- Fixed up a rebase screwup for whpx-internal.h
- Fixed ID_AA64ISAR1_EL1 and ID_AA64ISAR2_EL1 feature probe for -cpu host
- Switched to ID_AA64PFR1_EL1/ID_AA64DFR0_EL1 instead of their non-AA64 variant
Updates since v1:
- Shutdowns and reboots
- MPIDR_EL1 register sync
- Fixing GICD_TYPER_LPIS value
- IPA size clamping
- -cpu host now implemented
Mohamed Mediouni (26):
qtest: hw/arm: virt: skip ACPI test for ITS off
hw/arm: virt: add GICv2m for the case when ITS is not available
tests: data: update AArch64 ACPI tables
hw/arm: virt: cleanly fail on attempt to use the platform vGIC
together with ITS
hw: arm: virt: rework MSI-X configuration
hw: arm: virt-acpi-build: add temporary hack to match existing
behavior
docs: arm: update virt machine model description
whpx: Move around files before introducing AArch64 support
whpx: reshuffle common code
whpx: ifdef out winhvemulation on non-x86_64
whpx: common: add WHPX_INTERCEPT_DEBUG_TRAPS define
hw, target, accel: whpx: change apic_in_platform to kernel_irqchip
whpx: interrupt controller support
whpx: add arm64 support
whpx: change memory management logic
target/arm: cpu: mark WHPX as supporting PSCI 1.3
whpx: arm64: clamp down IPA size
hw/arm, accel/hvf, whpx: unify get_physical_address_range between WHPX
and HVF
whpx: arm64: implement -cpu host
target/arm: whpx: instantiate GIC early
whpx: arm64: gicv3: add migration blocker
whpx: enable arm64 builds
whpx: apic: use non-deprecated APIs to control interrupt controller
state
whpx: arm64: check for physical address width after WHPX availability
whpx: arm64: add partition-wide reset on the reboot path
MAINTAINERS: update the list of maintained files for WHPX
Philippe Mathieu-Daudé (1):
accel/system: Introduce hwaccel_enabled() helper
Sebastian Ott (1):
target/arm/kvm: add constants for new PSCI versions
MAINTAINERS | 6 +
accel/hvf/hvf-all.c | 7 +-
accel/meson.build | 1 +
accel/stubs/whpx-stub.c | 1 +
accel/whpx/meson.build | 7 +
{target/i386 => accel}/whpx/whpx-accel-ops.c | 6 +-
accel/whpx/whpx-common.c | 536 +++++++++
docs/system/arm/virt.rst | 13 +-
hw/arm/virt-acpi-build.c | 16 +-
hw/arm/virt.c | 140 ++-
hw/i386/x86-cpu.c | 4 +-
hw/intc/arm_gicv3_common.c | 3 +
hw/intc/arm_gicv3_whpx.c | 249 ++++
hw/intc/meson.build | 1 +
include/hw/arm/virt.h | 8 +-
include/hw/core/boards.h | 3 +-
include/hw/intc/arm_gicv3_common.h | 3 +
include/system/hvf_int.h | 5 +
include/system/hw_accel.h | 13 +
.../whpx => include/system}/whpx-accel-ops.h | 4 +-
include/system/whpx-all.h | 20 +
include/system/whpx-common.h | 26 +
.../whpx => include/system}/whpx-internal.h | 25 +-
include/system/whpx.h | 5 +-
meson.build | 20 +-
target/arm/cpu.c | 3 +
target/arm/cpu64.c | 17 +-
target/arm/hvf-stub.c | 20 -
target/arm/hvf/hvf.c | 6 +-
target/arm/hvf_arm.h | 3 -
target/arm/kvm-consts.h | 2 +
target/arm/meson.build | 2 +-
target/arm/whpx/meson.build | 5 +
target/arm/whpx/whpx-all.c | 1020 +++++++++++++++++
target/arm/whpx/whpx-stub.c | 15 +
target/arm/whpx_arm.h | 17 +
target/i386/cpu-apic.c | 2 +-
target/i386/hvf/hvf.c | 11 +
target/i386/whpx/meson.build | 1 -
target/i386/whpx/whpx-all.c | 569 +--------
target/i386/whpx/whpx-apic.c | 48 +-
tests/data/acpi/aarch64/virt/APIC.its_off | Bin 164 -> 188 bytes
42 files changed, 2215 insertions(+), 648 deletions(-)
create mode 100644 accel/whpx/meson.build
rename {target/i386 => accel}/whpx/whpx-accel-ops.c (96%)
create mode 100644 accel/whpx/whpx-common.c
create mode 100644 hw/intc/arm_gicv3_whpx.c
rename {target/i386/whpx => include/system}/whpx-accel-ops.h (92%)
create mode 100644 include/system/whpx-all.h
create mode 100644 include/system/whpx-common.h
rename {target/i386/whpx => include/system}/whpx-internal.h (88%)
delete mode 100644 target/arm/hvf-stub.c
create mode 100644 target/arm/whpx/meson.build
create mode 100644 target/arm/whpx/whpx-all.c
create mode 100644 target/arm/whpx/whpx-stub.c
create mode 100644 target/arm/whpx_arm.h
--
2.50.1 (Apple Git-155)
On 12/29/25 4:03 PM, Mohamed Mediouni wrote:
> Link to branch: https://github.com/mediouni-m/qemu whpx (tag for this submission: whpx-v13)
>
> Missing features:
> - VM save-restore: interrupt controller state notably
> - SVE register sync: I didn't have the time to test this on pre-release hardware with SVE2 support yet.
> So SVE2 is currently masked for VMs when running this.
>
> Known bugs:
> - U-Boot still doesn't work (hangs when trying to parse firmware) but EDK2 does.
>
> Note:
>
> "target/arm/kvm: add constants for new PSCI versions" taken from the mailing list.
>
> "accel/system: Introduce hwaccel_enabled() helper" taken from the mailing list, added here
> as part of this series to make it compilable as a whole.
>
> "hw/arm: virt: add GICv2m for the case when ITS is not available" present in both the HVF
> vGIC and this series.
>
> "hw: arm: virt-acpi-build: add temporary hack to match existing behavior" is
> for ACPI stability but what is the right approach to follow there?
>
> And another note:
>
> Seems that unlike HVF there isn't direct correspondence between WHv registers and the actual register layout,
> so didn't do changes there to a sysreg.inc.
>
> Updates since v12:
> - Address review comments and make sure that checkpatch shows no errors, make test also ran
> - Tested the Windows x86_64 build too in addition to Windows arm64 and macOS arm64
> - Hopefully the last revision, should be ready to merge.
>
> Updates since v11:
> - Address review comments
> - Rebase up to latest staging
> - Switch to assuming Qemu 11.0 as the newest machine model
>
> Updates since v10:
> - Bring forward to latest Qemu
> - Fix a typo in the GICv3+GICv2m PR
>
> Updates since v9:
> - Adding partition reset on the reboot side of things...
>
> Updates since v8:
> - v9 and v8 were not submitted properly because of my MTA not behaving, sorry for that.
> - v10 introduces a new argument, -M msi=, to handle MSI-X configuration more granularly.
> - That surfaced what I think is a bug (?), with vms->its=1 on GICv2 configurations... or I did understand everything wrong.
> - Oopsie due to email provider ratelimiting.
>
> Updates since v7:
> - Oops, fixing bug in "hw/arm: virt: cleanly fail on attempt to use the platform vGIC together with ITS".
> Other commits are unchanged.
>
> Updates since v6:
> - Rebasing
> - Fixing a bug in the GICv3+GICv2m case for ACPI table generation
> - getting rid of the slots infrastructure for memory management
> - Place the docs commit right after the "cleanly fail on attempt to run GICv3+GICv2m on an unsupported config" one
> as that's what switches ITS to a tristate.
> - Fixing a build issue when getting rid of the arch-specific arm64 hvf-stub.
>
> Updates since v5:
> - Rebasing
> - Address review comments
> - Rework ITS enablement to a tristate
> - On x86: move away from deprecated APIs to get/set APIC state
>
> Updates since v4:
> - Taking into account review comments
> - Add migration blocker in the vGICv3 code due to missing interrupt controller save/restore
> - Debug register sync
>
> Updates since v3:
> - Disabling SVE on WHPX
> - Taking into account review comments incl:
>
> - fixing x86 support
> - reduce the amount of __x86_64__ checks in common code to the minimum (winhvemulation)
> which can be reduced even further down the road.
> - generalize get_physical_address_range into something common between hvf and whpx
>
> Updates since v2:
> - Fixed up a rebase screwup for whpx-internal.h
> - Fixed ID_AA64ISAR1_EL1 and ID_AA64ISAR2_EL1 feature probe for -cpu host
> - Switched to ID_AA64PFR1_EL1/ID_AA64DFR0_EL1 instead of their non-AA64 variant
>
> Updates since v1:
> - Shutdowns and reboots
> - MPIDR_EL1 register sync
> - Fixing GICD_TYPER_LPIS value
> - IPA size clamping
> - -cpu host now implemented
>
> Mohamed Mediouni (26):
> qtest: hw/arm: virt: skip ACPI test for ITS off
> hw/arm: virt: add GICv2m for the case when ITS is not available
> tests: data: update AArch64 ACPI tables
> hw/arm: virt: cleanly fail on attempt to use the platform vGIC
> together with ITS
> hw: arm: virt: rework MSI-X configuration
> hw: arm: virt-acpi-build: add temporary hack to match existing
> behavior
> docs: arm: update virt machine model description
> whpx: Move around files before introducing AArch64 support
> whpx: reshuffle common code
> whpx: ifdef out winhvemulation on non-x86_64
> whpx: common: add WHPX_INTERCEPT_DEBUG_TRAPS define
> hw, target, accel: whpx: change apic_in_platform to kernel_irqchip
> whpx: interrupt controller support
> whpx: add arm64 support
> whpx: change memory management logic
> target/arm: cpu: mark WHPX as supporting PSCI 1.3
> whpx: arm64: clamp down IPA size
> hw/arm, accel/hvf, whpx: unify get_physical_address_range between WHPX
> and HVF
> whpx: arm64: implement -cpu host
> target/arm: whpx: instantiate GIC early
> whpx: arm64: gicv3: add migration blocker
> whpx: enable arm64 builds
> whpx: apic: use non-deprecated APIs to control interrupt controller
> state
> whpx: arm64: check for physical address width after WHPX availability
> whpx: arm64: add partition-wide reset on the reboot path
> MAINTAINERS: update the list of maintained files for WHPX
>
> Philippe Mathieu-Daudé (1):
> accel/system: Introduce hwaccel_enabled() helper
>
> Sebastian Ott (1):
> target/arm/kvm: add constants for new PSCI versions
>
> MAINTAINERS | 6 +
> accel/hvf/hvf-all.c | 7 +-
> accel/meson.build | 1 +
> accel/stubs/whpx-stub.c | 1 +
> accel/whpx/meson.build | 7 +
> {target/i386 => accel}/whpx/whpx-accel-ops.c | 6 +-
> accel/whpx/whpx-common.c | 536 +++++++++
> docs/system/arm/virt.rst | 13 +-
> hw/arm/virt-acpi-build.c | 16 +-
> hw/arm/virt.c | 140 ++-
> hw/i386/x86-cpu.c | 4 +-
> hw/intc/arm_gicv3_common.c | 3 +
> hw/intc/arm_gicv3_whpx.c | 249 ++++
> hw/intc/meson.build | 1 +
> include/hw/arm/virt.h | 8 +-
> include/hw/core/boards.h | 3 +-
> include/hw/intc/arm_gicv3_common.h | 3 +
> include/system/hvf_int.h | 5 +
> include/system/hw_accel.h | 13 +
> .../whpx => include/system}/whpx-accel-ops.h | 4 +-
> include/system/whpx-all.h | 20 +
> include/system/whpx-common.h | 26 +
> .../whpx => include/system}/whpx-internal.h | 25 +-
> include/system/whpx.h | 5 +-
> meson.build | 20 +-
> target/arm/cpu.c | 3 +
> target/arm/cpu64.c | 17 +-
> target/arm/hvf-stub.c | 20 -
> target/arm/hvf/hvf.c | 6 +-
> target/arm/hvf_arm.h | 3 -
> target/arm/kvm-consts.h | 2 +
> target/arm/meson.build | 2 +-
> target/arm/whpx/meson.build | 5 +
> target/arm/whpx/whpx-all.c | 1020 +++++++++++++++++
> target/arm/whpx/whpx-stub.c | 15 +
> target/arm/whpx_arm.h | 17 +
> target/i386/cpu-apic.c | 2 +-
> target/i386/hvf/hvf.c | 11 +
> target/i386/whpx/meson.build | 1 -
> target/i386/whpx/whpx-all.c | 569 +--------
> target/i386/whpx/whpx-apic.c | 48 +-
> tests/data/acpi/aarch64/virt/APIC.its_off | Bin 164 -> 188 bytes
> 42 files changed, 2215 insertions(+), 648 deletions(-)
> create mode 100644 accel/whpx/meson.build
> rename {target/i386 => accel}/whpx/whpx-accel-ops.c (96%)
> create mode 100644 accel/whpx/whpx-common.c
> create mode 100644 hw/intc/arm_gicv3_whpx.c
> rename {target/i386/whpx => include/system}/whpx-accel-ops.h (92%)
> create mode 100644 include/system/whpx-all.h
> create mode 100644 include/system/whpx-common.h
> rename {target/i386/whpx => include/system}/whpx-internal.h (88%)
> delete mode 100644 target/arm/hvf-stub.c
> create mode 100644 target/arm/whpx/meson.build
> create mode 100644 target/arm/whpx/whpx-all.c
> create mode 100644 target/arm/whpx/whpx-stub.c
> create mode 100644 target/arm/whpx_arm.h
>
Thanks Mohamed.
Looks all good to me, and all checks are passing.
I hope it can be pulled quickly by a maintainer, before this series
conflicts with any other changes on this area.
Regards,
Pierrick
Am 30. Dezember 2025 03:47:20 UTC schrieb Pierrick Bouvier <pierrick.bouvier@linaro.org>:
>On 12/29/25 4:03 PM, Mohamed Mediouni wrote:
>> Link to branch: https://github.com/mediouni-m/qemu whpx (tag for this submission: whpx-v13)
>>
>> Missing features:
>> - VM save-restore: interrupt controller state notably
>> - SVE register sync: I didn't have the time to test this on pre-release hardware with SVE2 support yet.
>> So SVE2 is currently masked for VMs when running this.
>>
>> Known bugs:
>> - U-Boot still doesn't work (hangs when trying to parse firmware) but EDK2 does.
>>
>> Note:
>>
>> "target/arm/kvm: add constants for new PSCI versions" taken from the mailing list.
>>
>> "accel/system: Introduce hwaccel_enabled() helper" taken from the mailing list, added here
>> as part of this series to make it compilable as a whole.
>>
>> "hw/arm: virt: add GICv2m for the case when ITS is not available" present in both the HVF
>> vGIC and this series.
>>
>> "hw: arm: virt-acpi-build: add temporary hack to match existing behavior" is
>> for ACPI stability but what is the right approach to follow there?
>>
>> And another note:
>>
>> Seems that unlike HVF there isn't direct correspondence between WHv registers and the actual register layout,
>> so didn't do changes there to a sysreg.inc.
>>
>> Updates since v12:
>> - Address review comments and make sure that checkpatch shows no errors, make test also ran
>> - Tested the Windows x86_64 build too in addition to Windows arm64 and macOS arm64
>> - Hopefully the last revision, should be ready to merge.
>>
>> Updates since v11:
>> - Address review comments
>> - Rebase up to latest staging
>> - Switch to assuming Qemu 11.0 as the newest machine model
>>
>> Updates since v10:
>> - Bring forward to latest Qemu
>> - Fix a typo in the GICv3+GICv2m PR
>>
>> Updates since v9:
>> - Adding partition reset on the reboot side of things...
>>
>> Updates since v8:
>> - v9 and v8 were not submitted properly because of my MTA not behaving, sorry for that.
>> - v10 introduces a new argument, -M msi=, to handle MSI-X configuration more granularly.
>> - That surfaced what I think is a bug (?), with vms->its=1 on GICv2 configurations... or I did understand everything wrong.
>> - Oopsie due to email provider ratelimiting.
>>
>> Updates since v7:
>> - Oops, fixing bug in "hw/arm: virt: cleanly fail on attempt to use the platform vGIC together with ITS".
>> Other commits are unchanged.
>>
>> Updates since v6:
>> - Rebasing
>> - Fixing a bug in the GICv3+GICv2m case for ACPI table generation
>> - getting rid of the slots infrastructure for memory management
>> - Place the docs commit right after the "cleanly fail on attempt to run GICv3+GICv2m on an unsupported config" one
>> as that's what switches ITS to a tristate.
>> - Fixing a build issue when getting rid of the arch-specific arm64 hvf-stub.
>>
>> Updates since v5:
>> - Rebasing
>> - Address review comments
>> - Rework ITS enablement to a tristate
>> - On x86: move away from deprecated APIs to get/set APIC state
>>
>> Updates since v4:
>> - Taking into account review comments
>> - Add migration blocker in the vGICv3 code due to missing interrupt controller save/restore
>> - Debug register sync
>>
>> Updates since v3:
>> - Disabling SVE on WHPX
>> - Taking into account review comments incl:
>>
>> - fixing x86 support
>> - reduce the amount of __x86_64__ checks in common code to the minimum (winhvemulation)
>> which can be reduced even further down the road.
>> - generalize get_physical_address_range into something common between hvf and whpx
>>
>> Updates since v2:
>> - Fixed up a rebase screwup for whpx-internal.h
>> - Fixed ID_AA64ISAR1_EL1 and ID_AA64ISAR2_EL1 feature probe for -cpu host
>> - Switched to ID_AA64PFR1_EL1/ID_AA64DFR0_EL1 instead of their non-AA64 variant
>>
>> Updates since v1:
>> - Shutdowns and reboots
>> - MPIDR_EL1 register sync
>> - Fixing GICD_TYPER_LPIS value
>> - IPA size clamping
>> - -cpu host now implemented
>>
>> Mohamed Mediouni (26):
>> qtest: hw/arm: virt: skip ACPI test for ITS off
>> hw/arm: virt: add GICv2m for the case when ITS is not available
>> tests: data: update AArch64 ACPI tables
>> hw/arm: virt: cleanly fail on attempt to use the platform vGIC
>> together with ITS
>> hw: arm: virt: rework MSI-X configuration
>> hw: arm: virt-acpi-build: add temporary hack to match existing
>> behavior
>> docs: arm: update virt machine model description
>> whpx: Move around files before introducing AArch64 support
>> whpx: reshuffle common code
>> whpx: ifdef out winhvemulation on non-x86_64
>> whpx: common: add WHPX_INTERCEPT_DEBUG_TRAPS define
>> hw, target, accel: whpx: change apic_in_platform to kernel_irqchip
>> whpx: interrupt controller support
>> whpx: add arm64 support
>> whpx: change memory management logic
>> target/arm: cpu: mark WHPX as supporting PSCI 1.3
>> whpx: arm64: clamp down IPA size
>> hw/arm, accel/hvf, whpx: unify get_physical_address_range between WHPX
>> and HVF
>> whpx: arm64: implement -cpu host
>> target/arm: whpx: instantiate GIC early
>> whpx: arm64: gicv3: add migration blocker
>> whpx: enable arm64 builds
>> whpx: apic: use non-deprecated APIs to control interrupt controller
>> state
>> whpx: arm64: check for physical address width after WHPX availability
>> whpx: arm64: add partition-wide reset on the reboot path
>> MAINTAINERS: update the list of maintained files for WHPX
>>
>> Philippe Mathieu-Daudé (1):
>> accel/system: Introduce hwaccel_enabled() helper
>>
>> Sebastian Ott (1):
>> target/arm/kvm: add constants for new PSCI versions
>>
>> MAINTAINERS | 6 +
>> accel/hvf/hvf-all.c | 7 +-
>> accel/meson.build | 1 +
>> accel/stubs/whpx-stub.c | 1 +
>> accel/whpx/meson.build | 7 +
>> {target/i386 => accel}/whpx/whpx-accel-ops.c | 6 +-
>> accel/whpx/whpx-common.c | 536 +++++++++
>> docs/system/arm/virt.rst | 13 +-
>> hw/arm/virt-acpi-build.c | 16 +-
>> hw/arm/virt.c | 140 ++-
>> hw/i386/x86-cpu.c | 4 +-
>> hw/intc/arm_gicv3_common.c | 3 +
>> hw/intc/arm_gicv3_whpx.c | 249 ++++
>> hw/intc/meson.build | 1 +
>> include/hw/arm/virt.h | 8 +-
>> include/hw/core/boards.h | 3 +-
>> include/hw/intc/arm_gicv3_common.h | 3 +
>> include/system/hvf_int.h | 5 +
>> include/system/hw_accel.h | 13 +
>> .../whpx => include/system}/whpx-accel-ops.h | 4 +-
>> include/system/whpx-all.h | 20 +
>> include/system/whpx-common.h | 26 +
>> .../whpx => include/system}/whpx-internal.h | 25 +-
>> include/system/whpx.h | 5 +-
>> meson.build | 20 +-
>> target/arm/cpu.c | 3 +
>> target/arm/cpu64.c | 17 +-
>> target/arm/hvf-stub.c | 20 -
>> target/arm/hvf/hvf.c | 6 +-
>> target/arm/hvf_arm.h | 3 -
>> target/arm/kvm-consts.h | 2 +
>> target/arm/meson.build | 2 +-
>> target/arm/whpx/meson.build | 5 +
>> target/arm/whpx/whpx-all.c | 1020 +++++++++++++++++
>> target/arm/whpx/whpx-stub.c | 15 +
>> target/arm/whpx_arm.h | 17 +
>> target/i386/cpu-apic.c | 2 +-
>> target/i386/hvf/hvf.c | 11 +
>> target/i386/whpx/meson.build | 1 -
>> target/i386/whpx/whpx-all.c | 569 +--------
>> target/i386/whpx/whpx-apic.c | 48 +-
>> tests/data/acpi/aarch64/virt/APIC.its_off | Bin 164 -> 188 bytes
>> 42 files changed, 2215 insertions(+), 648 deletions(-)
>> create mode 100644 accel/whpx/meson.build
>> rename {target/i386 => accel}/whpx/whpx-accel-ops.c (96%)
>> create mode 100644 accel/whpx/whpx-common.c
>> create mode 100644 hw/intc/arm_gicv3_whpx.c
>> rename {target/i386/whpx => include/system}/whpx-accel-ops.h (92%)
>> create mode 100644 include/system/whpx-all.h
>> create mode 100644 include/system/whpx-common.h
>> rename {target/i386/whpx => include/system}/whpx-internal.h (88%)
>> delete mode 100644 target/arm/hvf-stub.c
>> create mode 100644 target/arm/whpx/meson.build
>> create mode 100644 target/arm/whpx/whpx-all.c
>> create mode 100644 target/arm/whpx/whpx-stub.c
>> create mode 100644 target/arm/whpx_arm.h
>>
>
>Thanks Mohamed.
>Looks all good to me, and all checks are passing.
>I hope it can be pulled quickly by a maintainer, before this series conflicts with any other changes on this area.
Hi,
I still need to revert "whpx: apic: use non-deprecated APIs to control interrupt controller" for QEMU not to crash, see:
- https://lore.kernel.org/qemu-devel/4F98A2AD-02A7-4A7F-91B8-269E9EC8E5B1@gmail.com/
- https://lore.kernel.org/qemu-devel/D7E4B026-EF2F-4075-B424-06427346E97B@gmail.com/
The problem can be reproduced by running "qemu-system-x86_64 -accel whpx". Let me know if you need some further details.
Best regards,
Bernhard
>
>Regards,
>Pierrick
>
> On 1. Jan 2026, at 16:46, Bernhard Beschow <shentey@gmail.com> wrote:
>
>
>
> Am 30. Dezember 2025 03:47:20 UTC schrieb Pierrick Bouvier <pierrick.bouvier@linaro.org <mailto:pierrick.bouvier@linaro.org>>:
>> On 12/29/25 4:03 PM, Mohamed Mediouni wrote:
>>> Link to branch: https://github.com/mediouni-m/qemu whpx (tag for this submission: whpx-v13)
>>>
>>> Missing features:
>>> - VM save-restore: interrupt controller state notably
>>> - SVE register sync: I didn't have the time to test this on pre-release hardware with SVE2 support yet.
>>> So SVE2 is currently masked for VMs when running this.
>>>
>>> Known bugs:
>>> - U-Boot still doesn't work (hangs when trying to parse firmware) but EDK2 does.
>>>
>>> Note:
>>>
>>> "target/arm/kvm: add constants for new PSCI versions" taken from the mailing list.
>>>
>>> "accel/system: Introduce hwaccel_enabled() helper" taken from the mailing list, added here
>>> as part of this series to make it compilable as a whole.
>>>
>>> "hw/arm: virt: add GICv2m for the case when ITS is not available" present in both the HVF
>>> vGIC and this series.
>>>
>>> "hw: arm: virt-acpi-build: add temporary hack to match existing behavior" is
>>> for ACPI stability but what is the right approach to follow there?
>>>
>>> And another note:
>>>
>>> Seems that unlike HVF there isn't direct correspondence between WHv registers and the actual register layout,
>>> so didn't do changes there to a sysreg.inc.
>>>
>>> Updates since v12:
>>> - Address review comments and make sure that checkpatch shows no errors, make test also ran
>>> - Tested the Windows x86_64 build too in addition to Windows arm64 and macOS arm64
>>> - Hopefully the last revision, should be ready to merge.
>>>
>>> Updates since v11:
>>> - Address review comments
>>> - Rebase up to latest staging
>>> - Switch to assuming Qemu 11.0 as the newest machine model
>>>
>>> Updates since v10:
>>> - Bring forward to latest Qemu
>>> - Fix a typo in the GICv3+GICv2m PR
>>>
>>> Updates since v9:
>>> - Adding partition reset on the reboot side of things...
>>>
>>> Updates since v8:
>>> - v9 and v8 were not submitted properly because of my MTA not behaving, sorry for that.
>>> - v10 introduces a new argument, -M msi=, to handle MSI-X configuration more granularly.
>>> - That surfaced what I think is a bug (?), with vms->its=1 on GICv2 configurations... or I did understand everything wrong.
>>> - Oopsie due to email provider ratelimiting.
>>>
>>> Updates since v7:
>>> - Oops, fixing bug in "hw/arm: virt: cleanly fail on attempt to use the platform vGIC together with ITS".
>>> Other commits are unchanged.
>>>
>>> Updates since v6:
>>> - Rebasing
>>> - Fixing a bug in the GICv3+GICv2m case for ACPI table generation
>>> - getting rid of the slots infrastructure for memory management
>>> - Place the docs commit right after the "cleanly fail on attempt to run GICv3+GICv2m on an unsupported config" one
>>> as that's what switches ITS to a tristate.
>>> - Fixing a build issue when getting rid of the arch-specific arm64 hvf-stub.
>>>
>>> Updates since v5:
>>> - Rebasing
>>> - Address review comments
>>> - Rework ITS enablement to a tristate
>>> - On x86: move away from deprecated APIs to get/set APIC state
>>>
>>> Updates since v4:
>>> - Taking into account review comments
>>> - Add migration blocker in the vGICv3 code due to missing interrupt controller save/restore
>>> - Debug register sync
>>>
>>> Updates since v3:
>>> - Disabling SVE on WHPX
>>> - Taking into account review comments incl:
>>>
>>> - fixing x86 support
>>> - reduce the amount of __x86_64__ checks in common code to the minimum (winhvemulation)
>>> which can be reduced even further down the road.
>>> - generalize get_physical_address_range into something common between hvf and whpx
>>>
>>> Updates since v2:
>>> - Fixed up a rebase screwup for whpx-internal.h
>>> - Fixed ID_AA64ISAR1_EL1 and ID_AA64ISAR2_EL1 feature probe for -cpu host
>>> - Switched to ID_AA64PFR1_EL1/ID_AA64DFR0_EL1 instead of their non-AA64 variant
>>>
>>> Updates since v1:
>>> - Shutdowns and reboots
>>> - MPIDR_EL1 register sync
>>> - Fixing GICD_TYPER_LPIS value
>>> - IPA size clamping
>>> - -cpu host now implemented
>>>
>>> Mohamed Mediouni (26):
>>> qtest: hw/arm: virt: skip ACPI test for ITS off
>>> hw/arm: virt: add GICv2m for the case when ITS is not available
>>> tests: data: update AArch64 ACPI tables
>>> hw/arm: virt: cleanly fail on attempt to use the platform vGIC
>>> together with ITS
>>> hw: arm: virt: rework MSI-X configuration
>>> hw: arm: virt-acpi-build: add temporary hack to match existing
>>> behavior
>>> docs: arm: update virt machine model description
>>> whpx: Move around files before introducing AArch64 support
>>> whpx: reshuffle common code
>>> whpx: ifdef out winhvemulation on non-x86_64
>>> whpx: common: add WHPX_INTERCEPT_DEBUG_TRAPS define
>>> hw, target, accel: whpx: change apic_in_platform to kernel_irqchip
>>> whpx: interrupt controller support
>>> whpx: add arm64 support
>>> whpx: change memory management logic
>>> target/arm: cpu: mark WHPX as supporting PSCI 1.3
>>> whpx: arm64: clamp down IPA size
>>> hw/arm, accel/hvf, whpx: unify get_physical_address_range between WHPX
>>> and HVF
>>> whpx: arm64: implement -cpu host
>>> target/arm: whpx: instantiate GIC early
>>> whpx: arm64: gicv3: add migration blocker
>>> whpx: enable arm64 builds
>>> whpx: apic: use non-deprecated APIs to control interrupt controller
>>> state
>>> whpx: arm64: check for physical address width after WHPX availability
>>> whpx: arm64: add partition-wide reset on the reboot path
>>> MAINTAINERS: update the list of maintained files for WHPX
>>>
>>> Philippe Mathieu-Daudé (1):
>>> accel/system: Introduce hwaccel_enabled() helper
>>>
>>> Sebastian Ott (1):
>>> target/arm/kvm: add constants for new PSCI versions
>>>
>>> MAINTAINERS | 6 +
>>> accel/hvf/hvf-all.c | 7 +-
>>> accel/meson.build | 1 +
>>> accel/stubs/whpx-stub.c | 1 +
>>> accel/whpx/meson.build | 7 +
>>> {target/i386 => accel}/whpx/whpx-accel-ops.c | 6 +-
>>> accel/whpx/whpx-common.c | 536 +++++++++
>>> docs/system/arm/virt.rst | 13 +-
>>> hw/arm/virt-acpi-build.c | 16 +-
>>> hw/arm/virt.c | 140 ++-
>>> hw/i386/x86-cpu.c | 4 +-
>>> hw/intc/arm_gicv3_common.c | 3 +
>>> hw/intc/arm_gicv3_whpx.c | 249 ++++
>>> hw/intc/meson.build | 1 +
>>> include/hw/arm/virt.h | 8 +-
>>> include/hw/core/boards.h | 3 +-
>>> include/hw/intc/arm_gicv3_common.h | 3 +
>>> include/system/hvf_int.h | 5 +
>>> include/system/hw_accel.h | 13 +
>>> .../whpx => include/system}/whpx-accel-ops.h | 4 +-
>>> include/system/whpx-all.h | 20 +
>>> include/system/whpx-common.h | 26 +
>>> .../whpx => include/system}/whpx-internal.h | 25 +-
>>> include/system/whpx.h | 5 +-
>>> meson.build | 20 +-
>>> target/arm/cpu.c | 3 +
>>> target/arm/cpu64.c | 17 +-
>>> target/arm/hvf-stub.c | 20 -
>>> target/arm/hvf/hvf.c | 6 +-
>>> target/arm/hvf_arm.h | 3 -
>>> target/arm/kvm-consts.h | 2 +
>>> target/arm/meson.build | 2 +-
>>> target/arm/whpx/meson.build | 5 +
>>> target/arm/whpx/whpx-all.c | 1020 +++++++++++++++++
>>> target/arm/whpx/whpx-stub.c | 15 +
>>> target/arm/whpx_arm.h | 17 +
>>> target/i386/cpu-apic.c | 2 +-
>>> target/i386/hvf/hvf.c | 11 +
>>> target/i386/whpx/meson.build | 1 -
>>> target/i386/whpx/whpx-all.c | 569 +--------
>>> target/i386/whpx/whpx-apic.c | 48 +-
>>> tests/data/acpi/aarch64/virt/APIC.its_off | Bin 164 -> 188 bytes
>>> 42 files changed, 2215 insertions(+), 648 deletions(-)
>>> create mode 100644 accel/whpx/meson.build
>>> rename {target/i386 => accel}/whpx/whpx-accel-ops.c (96%)
>>> create mode 100644 accel/whpx/whpx-common.c
>>> create mode 100644 hw/intc/arm_gicv3_whpx.c
>>> rename {target/i386/whpx => include/system}/whpx-accel-ops.h (92%)
>>> create mode 100644 include/system/whpx-all.h
>>> create mode 100644 include/system/whpx-common.h
>>> rename {target/i386/whpx => include/system}/whpx-internal.h (88%)
>>> delete mode 100644 target/arm/hvf-stub.c
>>> create mode 100644 target/arm/whpx/meson.build
>>> create mode 100644 target/arm/whpx/whpx-all.c
>>> create mode 100644 target/arm/whpx/whpx-stub.c
>>> create mode 100644 target/arm/whpx_arm.h
>>>
>>
>> Thanks Mohamed.
>> Looks all good to me, and all checks are passing.
>> I hope it can be pulled quickly by a maintainer, before this series conflicts with any other changes on this area.
>
> Hi,
>
> I still need to revert "whpx: apic: use non-deprecated APIs to control interrupt controller" for QEMU not to crash, see:
> - https://lore.kernel.org/qemu-devel/4F98A2AD-02A7-4A7F-91B8-269E9EC8E5B1@gmail.com/
> - https://lore.kernel.org/qemu-devel/D7E4B026-EF2F-4075-B424-06427346E97B@gmail.com/
>
> The problem can be reproduced by running "qemu-system-x86_64 -accel whpx". Let me know if you need some further details.
>
> Best regards,
> Bernhard
Hello,
Will be useful to know which platform you saw this on, and that patch is safe to drop on its own.
Will send the pull request (if needed to send one) without it pending more investigation.
Thank you,
-Mohamed
>>
>> Regards,
>> Pierrick
> On 1. Jan 2026, at 20:26, Mohamed Mediouni <mohamed@unpredictable.fr> wrote:
>
>
>
>> On 1. Jan 2026, at 16:46, Bernhard Beschow <shentey@gmail.com> wrote:
>>
>>
>>
>> Am 30. Dezember 2025 03:47:20 UTC schrieb Pierrick Bouvier <pierrick.bouvier@linaro.org <mailto:pierrick.bouvier@linaro.org>>:
>>> On 12/29/25 4:03 PM, Mohamed Mediouni wrote:
>>>> Link to branch: https://github.com/mediouni-m/qemu whpx (tag for this submission: whpx-v13)
>>>>
>>>> Missing features:
>>>> - VM save-restore: interrupt controller state notably
>>>> - SVE register sync: I didn't have the time to test this on pre-release hardware with SVE2 support yet.
>>>> So SVE2 is currently masked for VMs when running this.
>>>>
>>>> Known bugs:
>>>> - U-Boot still doesn't work (hangs when trying to parse firmware) but EDK2 does.
>>>>
>>>> Note:
>>>>
>>>> "target/arm/kvm: add constants for new PSCI versions" taken from the mailing list.
>>>>
>>>> "accel/system: Introduce hwaccel_enabled() helper" taken from the mailing list, added here
>>>> as part of this series to make it compilable as a whole.
>>>>
>>>> "hw/arm: virt: add GICv2m for the case when ITS is not available" present in both the HVF
>>>> vGIC and this series.
>>>>
>>>> "hw: arm: virt-acpi-build: add temporary hack to match existing behavior" is
>>>> for ACPI stability but what is the right approach to follow there?
>>>>
>>>> And another note:
>>>>
>>>> Seems that unlike HVF there isn't direct correspondence between WHv registers and the actual register layout,
>>>> so didn't do changes there to a sysreg.inc.
>>>>
>>>> Updates since v12:
>>>> - Address review comments and make sure that checkpatch shows no errors, make test also ran
>>>> - Tested the Windows x86_64 build too in addition to Windows arm64 and macOS arm64
>>>> - Hopefully the last revision, should be ready to merge.
>>>>
>>>> Updates since v11:
>>>> - Address review comments
>>>> - Rebase up to latest staging
>>>> - Switch to assuming Qemu 11.0 as the newest machine model
>>>>
>>>> Updates since v10:
>>>> - Bring forward to latest Qemu
>>>> - Fix a typo in the GICv3+GICv2m PR
>>>>
>>>> Updates since v9:
>>>> - Adding partition reset on the reboot side of things...
>>>>
>>>> Updates since v8:
>>>> - v9 and v8 were not submitted properly because of my MTA not behaving, sorry for that.
>>>> - v10 introduces a new argument, -M msi=, to handle MSI-X configuration more granularly.
>>>> - That surfaced what I think is a bug (?), with vms->its=1 on GICv2 configurations... or I did understand everything wrong.
>>>> - Oopsie due to email provider ratelimiting.
>>>>
>>>> Updates since v7:
>>>> - Oops, fixing bug in "hw/arm: virt: cleanly fail on attempt to use the platform vGIC together with ITS".
>>>> Other commits are unchanged.
>>>>
>>>> Updates since v6:
>>>> - Rebasing
>>>> - Fixing a bug in the GICv3+GICv2m case for ACPI table generation
>>>> - getting rid of the slots infrastructure for memory management
>>>> - Place the docs commit right after the "cleanly fail on attempt to run GICv3+GICv2m on an unsupported config" one
>>>> as that's what switches ITS to a tristate.
>>>> - Fixing a build issue when getting rid of the arch-specific arm64 hvf-stub.
>>>>
>>>> Updates since v5:
>>>> - Rebasing
>>>> - Address review comments
>>>> - Rework ITS enablement to a tristate
>>>> - On x86: move away from deprecated APIs to get/set APIC state
>>>>
>>>> Updates since v4:
>>>> - Taking into account review comments
>>>> - Add migration blocker in the vGICv3 code due to missing interrupt controller save/restore
>>>> - Debug register sync
>>>>
>>>> Updates since v3:
>>>> - Disabling SVE on WHPX
>>>> - Taking into account review comments incl:
>>>>
>>>> - fixing x86 support
>>>> - reduce the amount of __x86_64__ checks in common code to the minimum (winhvemulation)
>>>> which can be reduced even further down the road.
>>>> - generalize get_physical_address_range into something common between hvf and whpx
>>>>
>>>> Updates since v2:
>>>> - Fixed up a rebase screwup for whpx-internal.h
>>>> - Fixed ID_AA64ISAR1_EL1 and ID_AA64ISAR2_EL1 feature probe for -cpu host
>>>> - Switched to ID_AA64PFR1_EL1/ID_AA64DFR0_EL1 instead of their non-AA64 variant
>>>>
>>>> Updates since v1:
>>>> - Shutdowns and reboots
>>>> - MPIDR_EL1 register sync
>>>> - Fixing GICD_TYPER_LPIS value
>>>> - IPA size clamping
>>>> - -cpu host now implemented
>>>>
>>>> Mohamed Mediouni (26):
>>>> qtest: hw/arm: virt: skip ACPI test for ITS off
>>>> hw/arm: virt: add GICv2m for the case when ITS is not available
>>>> tests: data: update AArch64 ACPI tables
>>>> hw/arm: virt: cleanly fail on attempt to use the platform vGIC
>>>> together with ITS
>>>> hw: arm: virt: rework MSI-X configuration
>>>> hw: arm: virt-acpi-build: add temporary hack to match existing
>>>> behavior
>>>> docs: arm: update virt machine model description
>>>> whpx: Move around files before introducing AArch64 support
>>>> whpx: reshuffle common code
>>>> whpx: ifdef out winhvemulation on non-x86_64
>>>> whpx: common: add WHPX_INTERCEPT_DEBUG_TRAPS define
>>>> hw, target, accel: whpx: change apic_in_platform to kernel_irqchip
>>>> whpx: interrupt controller support
>>>> whpx: add arm64 support
>>>> whpx: change memory management logic
>>>> target/arm: cpu: mark WHPX as supporting PSCI 1.3
>>>> whpx: arm64: clamp down IPA size
>>>> hw/arm, accel/hvf, whpx: unify get_physical_address_range between WHPX
>>>> and HVF
>>>> whpx: arm64: implement -cpu host
>>>> target/arm: whpx: instantiate GIC early
>>>> whpx: arm64: gicv3: add migration blocker
>>>> whpx: enable arm64 builds
>>>> whpx: apic: use non-deprecated APIs to control interrupt controller
>>>> state
>>>> whpx: arm64: check for physical address width after WHPX availability
>>>> whpx: arm64: add partition-wide reset on the reboot path
>>>> MAINTAINERS: update the list of maintained files for WHPX
>>>>
>>>> Philippe Mathieu-Daudé (1):
>>>> accel/system: Introduce hwaccel_enabled() helper
>>>>
>>>> Sebastian Ott (1):
>>>> target/arm/kvm: add constants for new PSCI versions
>>>>
>>>> MAINTAINERS | 6 +
>>>> accel/hvf/hvf-all.c | 7 +-
>>>> accel/meson.build | 1 +
>>>> accel/stubs/whpx-stub.c | 1 +
>>>> accel/whpx/meson.build | 7 +
>>>> {target/i386 => accel}/whpx/whpx-accel-ops.c | 6 +-
>>>> accel/whpx/whpx-common.c | 536 +++++++++
>>>> docs/system/arm/virt.rst | 13 +-
>>>> hw/arm/virt-acpi-build.c | 16 +-
>>>> hw/arm/virt.c | 140 ++-
>>>> hw/i386/x86-cpu.c | 4 +-
>>>> hw/intc/arm_gicv3_common.c | 3 +
>>>> hw/intc/arm_gicv3_whpx.c | 249 ++++
>>>> hw/intc/meson.build | 1 +
>>>> include/hw/arm/virt.h | 8 +-
>>>> include/hw/core/boards.h | 3 +-
>>>> include/hw/intc/arm_gicv3_common.h | 3 +
>>>> include/system/hvf_int.h | 5 +
>>>> include/system/hw_accel.h | 13 +
>>>> .../whpx => include/system}/whpx-accel-ops.h | 4 +-
>>>> include/system/whpx-all.h | 20 +
>>>> include/system/whpx-common.h | 26 +
>>>> .../whpx => include/system}/whpx-internal.h | 25 +-
>>>> include/system/whpx.h | 5 +-
>>>> meson.build | 20 +-
>>>> target/arm/cpu.c | 3 +
>>>> target/arm/cpu64.c | 17 +-
>>>> target/arm/hvf-stub.c | 20 -
>>>> target/arm/hvf/hvf.c | 6 +-
>>>> target/arm/hvf_arm.h | 3 -
>>>> target/arm/kvm-consts.h | 2 +
>>>> target/arm/meson.build | 2 +-
>>>> target/arm/whpx/meson.build | 5 +
>>>> target/arm/whpx/whpx-all.c | 1020 +++++++++++++++++
>>>> target/arm/whpx/whpx-stub.c | 15 +
>>>> target/arm/whpx_arm.h | 17 +
>>>> target/i386/cpu-apic.c | 2 +-
>>>> target/i386/hvf/hvf.c | 11 +
>>>> target/i386/whpx/meson.build | 1 -
>>>> target/i386/whpx/whpx-all.c | 569 +--------
>>>> target/i386/whpx/whpx-apic.c | 48 +-
>>>> tests/data/acpi/aarch64/virt/APIC.its_off | Bin 164 -> 188 bytes
>>>> 42 files changed, 2215 insertions(+), 648 deletions(-)
>>>> create mode 100644 accel/whpx/meson.build
>>>> rename {target/i386 => accel}/whpx/whpx-accel-ops.c (96%)
>>>> create mode 100644 accel/whpx/whpx-common.c
>>>> create mode 100644 hw/intc/arm_gicv3_whpx.c
>>>> rename {target/i386/whpx => include/system}/whpx-accel-ops.h (92%)
>>>> create mode 100644 include/system/whpx-all.h
>>>> create mode 100644 include/system/whpx-common.h
>>>> rename {target/i386/whpx => include/system}/whpx-internal.h (88%)
>>>> delete mode 100644 target/arm/hvf-stub.c
>>>> create mode 100644 target/arm/whpx/meson.build
>>>> create mode 100644 target/arm/whpx/whpx-all.c
>>>> create mode 100644 target/arm/whpx/whpx-stub.c
>>>> create mode 100644 target/arm/whpx_arm.h
>>>>
>>>
>>> Thanks Mohamed.
>>> Looks all good to me, and all checks are passing.
>>> I hope it can be pulled quickly by a maintainer, before this series conflicts with any other changes on this area.
>>
>> Hi,
>>
>> I still need to revert "whpx: apic: use non-deprecated APIs to control interrupt controller" for QEMU not to crash, see:
>> - https://lore.kernel.org/qemu-devel/4F98A2AD-02A7-4A7F-91B8-269E9EC8E5B1@gmail.com/
>> - https://lore.kernel.org/qemu-devel/D7E4B026-EF2F-4075-B424-06427346E97B@gmail.com/
>>
>> The problem can be reproduced by running "qemu-system-x86_64 -accel whpx". Let me know if you need some further details.
>>
>> Best regards,
>> Bernhard
>
> Hello,
>
> Will be useful to know which platform you saw this on, and that patch is safe to drop on its own.
> Will send the pull request (if needed to send one) without it pending more investigation.
>
> Thank you,
> -Mohamed
Nevermind I can reproduce locally on Windows 11 version 25H2.
Looking further later…
>>>
>>> Regards,
>>> Pierrick
>
On 2025/12/30 9:03, Mohamed Mediouni wrote:
> Link to branch: https://github.com/mediouni-m/qemu whpx (tag for this submission: whpx-v13)
>
> Missing features:
> - VM save-restore: interrupt controller state notably
> - SVE register sync: I didn't have the time to test this on pre-release hardware with SVE2 support yet.
> So SVE2 is currently masked for VMs when running this.
>
> Known bugs:
> - U-Boot still doesn't work (hangs when trying to parse firmware) but EDK2 does.
>
> Note:
>
> "target/arm/kvm: add constants for new PSCI versions" taken from the mailing list.
>
> "accel/system: Introduce hwaccel_enabled() helper" taken from the mailing list, added here
> as part of this series to make it compilable as a whole.
>
> "hw/arm: virt: add GICv2m for the case when ITS is not available" present in both the HVF
> vGIC and this series.
>
> "hw: arm: virt-acpi-build: add temporary hack to match existing behavior" is
> for ACPI stability but what is the right approach to follow there?
Since I missed this question in previous versions and seems no one have
answered yet; so I add my answer here:
If the hack is intended to be temporary, it should be implemented with a
compatibility property.
docs/devel/migration/compatibility.rst says "migration is only supposed
to work if you use the same machine type in both source and
destination." So it is fine to make a sensible change to the
guest-visible behavior for newer machine type versions.
What's not tolerated is to break the existing versions. Please note that
such a rule is applied for *each patch* instead of the entire series. It
looks the patch series once creates a change of the ACPI table and patch
"hw: arm: virt-acpi-build: add temporary hack to match existing
behavior" reverts it. This prevents git bisect so should be avoided
according to: docs/devel/submitting-a-patch.rst
I think making a change is fine as long as the rules described in the
documentation are followed and it "makes sense" in general; I cannot
really tell if it makes sense since I have rarely touched that
particular code, but you can actually send a patch to make the change,
possibily with the RFC tag, and ask for review.
Regards,
Akihiko Odaki
>
> And another note:
>
> Seems that unlike HVF there isn't direct correspondence between WHv registers and the actual register layout,
> so didn't do changes there to a sysreg.inc.
>
> Updates since v12:
> - Address review comments and make sure that checkpatch shows no errors, make test also ran
> - Tested the Windows x86_64 build too in addition to Windows arm64 and macOS arm64
> - Hopefully the last revision, should be ready to merge.
>
> Updates since v11:
> - Address review comments
> - Rebase up to latest staging
> - Switch to assuming Qemu 11.0 as the newest machine model
>
> Updates since v10:
> - Bring forward to latest Qemu
> - Fix a typo in the GICv3+GICv2m PR
>
> Updates since v9:
> - Adding partition reset on the reboot side of things...
>
> Updates since v8:
> - v9 and v8 were not submitted properly because of my MTA not behaving, sorry for that.
> - v10 introduces a new argument, -M msi=, to handle MSI-X configuration more granularly.
> - That surfaced what I think is a bug (?), with vms->its=1 on GICv2 configurations... or I did understand everything wrong.
> - Oopsie due to email provider ratelimiting.
>
> Updates since v7:
> - Oops, fixing bug in "hw/arm: virt: cleanly fail on attempt to use the platform vGIC together with ITS".
> Other commits are unchanged.
>
> Updates since v6:
> - Rebasing
> - Fixing a bug in the GICv3+GICv2m case for ACPI table generation
> - getting rid of the slots infrastructure for memory management
> - Place the docs commit right after the "cleanly fail on attempt to run GICv3+GICv2m on an unsupported config" one
> as that's what switches ITS to a tristate.
> - Fixing a build issue when getting rid of the arch-specific arm64 hvf-stub.
>
> Updates since v5:
> - Rebasing
> - Address review comments
> - Rework ITS enablement to a tristate
> - On x86: move away from deprecated APIs to get/set APIC state
>
> Updates since v4:
> - Taking into account review comments
> - Add migration blocker in the vGICv3 code due to missing interrupt controller save/restore
> - Debug register sync
>
> Updates since v3:
> - Disabling SVE on WHPX
> - Taking into account review comments incl:
>
> - fixing x86 support
> - reduce the amount of __x86_64__ checks in common code to the minimum (winhvemulation)
> which can be reduced even further down the road.
> - generalize get_physical_address_range into something common between hvf and whpx
>
> Updates since v2:
> - Fixed up a rebase screwup for whpx-internal.h
> - Fixed ID_AA64ISAR1_EL1 and ID_AA64ISAR2_EL1 feature probe for -cpu host
> - Switched to ID_AA64PFR1_EL1/ID_AA64DFR0_EL1 instead of their non-AA64 variant
>
> Updates since v1:
> - Shutdowns and reboots
> - MPIDR_EL1 register sync
> - Fixing GICD_TYPER_LPIS value
> - IPA size clamping
> - -cpu host now implemented
>
> Mohamed Mediouni (26):
> qtest: hw/arm: virt: skip ACPI test for ITS off
> hw/arm: virt: add GICv2m for the case when ITS is not available
> tests: data: update AArch64 ACPI tables
> hw/arm: virt: cleanly fail on attempt to use the platform vGIC
> together with ITS
> hw: arm: virt: rework MSI-X configuration
> hw: arm: virt-acpi-build: add temporary hack to match existing
> behavior
> docs: arm: update virt machine model description
> whpx: Move around files before introducing AArch64 support
> whpx: reshuffle common code
> whpx: ifdef out winhvemulation on non-x86_64
> whpx: common: add WHPX_INTERCEPT_DEBUG_TRAPS define
> hw, target, accel: whpx: change apic_in_platform to kernel_irqchip
> whpx: interrupt controller support
> whpx: add arm64 support
> whpx: change memory management logic
> target/arm: cpu: mark WHPX as supporting PSCI 1.3
> whpx: arm64: clamp down IPA size
> hw/arm, accel/hvf, whpx: unify get_physical_address_range between WHPX
> and HVF
> whpx: arm64: implement -cpu host
> target/arm: whpx: instantiate GIC early
> whpx: arm64: gicv3: add migration blocker
> whpx: enable arm64 builds
> whpx: apic: use non-deprecated APIs to control interrupt controller
> state
> whpx: arm64: check for physical address width after WHPX availability
> whpx: arm64: add partition-wide reset on the reboot path
> MAINTAINERS: update the list of maintained files for WHPX
>
> Philippe Mathieu-Daudé (1):
> accel/system: Introduce hwaccel_enabled() helper
>
> Sebastian Ott (1):
> target/arm/kvm: add constants for new PSCI versions
>
> MAINTAINERS | 6 +
> accel/hvf/hvf-all.c | 7 +-
> accel/meson.build | 1 +
> accel/stubs/whpx-stub.c | 1 +
> accel/whpx/meson.build | 7 +
> {target/i386 => accel}/whpx/whpx-accel-ops.c | 6 +-
> accel/whpx/whpx-common.c | 536 +++++++++
> docs/system/arm/virt.rst | 13 +-
> hw/arm/virt-acpi-build.c | 16 +-
> hw/arm/virt.c | 140 ++-
> hw/i386/x86-cpu.c | 4 +-
> hw/intc/arm_gicv3_common.c | 3 +
> hw/intc/arm_gicv3_whpx.c | 249 ++++
> hw/intc/meson.build | 1 +
> include/hw/arm/virt.h | 8 +-
> include/hw/core/boards.h | 3 +-
> include/hw/intc/arm_gicv3_common.h | 3 +
> include/system/hvf_int.h | 5 +
> include/system/hw_accel.h | 13 +
> .../whpx => include/system}/whpx-accel-ops.h | 4 +-
> include/system/whpx-all.h | 20 +
> include/system/whpx-common.h | 26 +
> .../whpx => include/system}/whpx-internal.h | 25 +-
> include/system/whpx.h | 5 +-
> meson.build | 20 +-
> target/arm/cpu.c | 3 +
> target/arm/cpu64.c | 17 +-
> target/arm/hvf-stub.c | 20 -
> target/arm/hvf/hvf.c | 6 +-
> target/arm/hvf_arm.h | 3 -
> target/arm/kvm-consts.h | 2 +
> target/arm/meson.build | 2 +-
> target/arm/whpx/meson.build | 5 +
> target/arm/whpx/whpx-all.c | 1020 +++++++++++++++++
> target/arm/whpx/whpx-stub.c | 15 +
> target/arm/whpx_arm.h | 17 +
> target/i386/cpu-apic.c | 2 +-
> target/i386/hvf/hvf.c | 11 +
> target/i386/whpx/meson.build | 1 -
> target/i386/whpx/whpx-all.c | 569 +--------
> target/i386/whpx/whpx-apic.c | 48 +-
> tests/data/acpi/aarch64/virt/APIC.its_off | Bin 164 -> 188 bytes
> 42 files changed, 2215 insertions(+), 648 deletions(-)
> create mode 100644 accel/whpx/meson.build
> rename {target/i386 => accel}/whpx/whpx-accel-ops.c (96%)
> create mode 100644 accel/whpx/whpx-common.c
> create mode 100644 hw/intc/arm_gicv3_whpx.c
> rename {target/i386/whpx => include/system}/whpx-accel-ops.h (92%)
> create mode 100644 include/system/whpx-all.h
> create mode 100644 include/system/whpx-common.h
> rename {target/i386/whpx => include/system}/whpx-internal.h (88%)
> delete mode 100644 target/arm/hvf-stub.c
> create mode 100644 target/arm/whpx/meson.build
> create mode 100644 target/arm/whpx/whpx-all.c
> create mode 100644 target/arm/whpx/whpx-stub.c
> create mode 100644 target/arm/whpx_arm.h
>
© 2016 - 2026 Red Hat, Inc.