[PATCH v4 08/19] hw/arm/aspeed: Attach UART device to AST1700 model

Kane Chen via posted 19 patches 1 month, 2 weeks ago
There is a newer version of this series
[PATCH v4 08/19] hw/arm/aspeed: Attach UART device to AST1700 model
Posted by Kane Chen via 1 month, 2 weeks ago
From: Kane-Chen-AS <kane_chen@aspeedtech.com>

Connect the UART controller to the AST1700 model by mapping its MMIO
region.

Signed-off-by: Kane-Chen-AS <kane_chen@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
 include/hw/arm/aspeed_ast1700.h |  2 ++
 hw/arm/aspeed_ast1700.c         | 18 ++++++++++++++++++
 2 files changed, 20 insertions(+)

diff --git a/include/hw/arm/aspeed_ast1700.h b/include/hw/arm/aspeed_ast1700.h
index b9ee4952d0..a0d6b3ae44 100644
--- a/include/hw/arm/aspeed_ast1700.h
+++ b/include/hw/arm/aspeed_ast1700.h
@@ -10,6 +10,7 @@
 
 #include "hw/sysbus.h"
 #include "hw/misc/aspeed_ltpi.h"
+#include "hw/char/serial-mm.h"
 
 #define TYPE_ASPEED_AST1700 "aspeed.ast1700"
 
@@ -21,6 +22,7 @@ struct AspeedAST1700SoCState {
     MemoryRegion iomem;
 
     AspeedLTPIState ltpi;
+    SerialMM uart;
 };
 
 #endif /* ASPEED_AST1700_H */
diff --git a/hw/arm/aspeed_ast1700.c b/hw/arm/aspeed_ast1700.c
index eeb586102f..f444582795 100644
--- a/hw/arm/aspeed_ast1700.c
+++ b/hw/arm/aspeed_ast1700.c
@@ -10,15 +10,18 @@
 #include "hw/boards.h"
 #include "hw/qdev-core.h"
 #include "qom/object.h"
+#include "hw/qdev-properties.h"
 #include "hw/arm/aspeed_ast1700.h"
 
 #define AST2700_SOC_LTPI_SIZE        0x01000000
 
 enum {
+    ASPEED_AST1700_DEV_UART12,
     ASPEED_AST1700_DEV_LTPI_CTRL,
 };
 
 static const hwaddr aspeed_ast1700_io_memmap[] = {
+    [ASPEED_AST1700_DEV_UART12]    =  0x00C33B00,
     [ASPEED_AST1700_DEV_LTPI_CTRL] =  0x00C34000,
 };
 
@@ -32,6 +35,17 @@ static void aspeed_ast1700_realize(DeviceState *dev, Error **errp)
                        AST2700_SOC_LTPI_SIZE);
     sysbus_init_mmio(sbd, &s->iomem);
 
+    /* UART */
+    qdev_prop_set_uint8(DEVICE(&s->uart), "regshift", 2);
+    qdev_prop_set_uint32(DEVICE(&s->uart), "baudbase", 38400);
+    qdev_prop_set_uint8(DEVICE(&s->uart), "endianness", DEVICE_LITTLE_ENDIAN);
+    if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart), errp)) {
+        return;
+    }
+    memory_region_add_subregion(&s->iomem,
+                        aspeed_ast1700_io_memmap[ASPEED_AST1700_DEV_UART12],
+                        sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart), 0));
+
     /* LTPI controller */
     if (!sysbus_realize(SYS_BUS_DEVICE(&s->ltpi), errp)) {
         return;
@@ -45,6 +59,10 @@ static void aspeed_ast1700_instance_init(Object *obj)
 {
     AspeedAST1700SoCState *s = ASPEED_AST1700(obj);
 
+    /* UART */
+    object_initialize_child(obj, "uart[*]", &s->uart,
+                            TYPE_SERIAL_MM);
+
     /* LTPI controller */
     object_initialize_child(obj, "ltpi-ctrl",
                             &s->ltpi, TYPE_ASPEED_LTPI);
-- 
2.43.0


Re: [PATCH v4 08/19] hw/arm/aspeed: Attach UART device to AST1700 model
Posted by Nabih Estefan 1 month, 1 week ago
On Tue, Dec 23, 2025 at 5:42 PM Kane Chen <kane_chen@aspeedtech.com> wrote:
>
> From: Kane-Chen-AS <kane_chen@aspeedtech.com>
>
> Connect the UART controller to the AST1700 model by mapping its MMIO
> region.
>
> Signed-off-by: Kane-Chen-AS <kane_chen@aspeedtech.com>
> Reviewed-by: Cédric Le Goater <clg@redhat.com>

Reviewed-by: Nabih Estefan <nabihestefan@google.com>
Tested-by: Nabih Estefan <nabihestefan@google.com>


> ---
>  include/hw/arm/aspeed_ast1700.h |  2 ++
>  hw/arm/aspeed_ast1700.c         | 18 ++++++++++++++++++
>  2 files changed, 20 insertions(+)
>
> diff --git a/include/hw/arm/aspeed_ast1700.h b/include/hw/arm/aspeed_ast1700.h
> index b9ee4952d0..a0d6b3ae44 100644
> --- a/include/hw/arm/aspeed_ast1700.h
> +++ b/include/hw/arm/aspeed_ast1700.h
> @@ -10,6 +10,7 @@
>
>  #include "hw/sysbus.h"
>  #include "hw/misc/aspeed_ltpi.h"
> +#include "hw/char/serial-mm.h"
>
>  #define TYPE_ASPEED_AST1700 "aspeed.ast1700"
>
> @@ -21,6 +22,7 @@ struct AspeedAST1700SoCState {
>      MemoryRegion iomem;
>
>      AspeedLTPIState ltpi;
> +    SerialMM uart;
>  };
>
>  #endif /* ASPEED_AST1700_H */
> diff --git a/hw/arm/aspeed_ast1700.c b/hw/arm/aspeed_ast1700.c
> index eeb586102f..f444582795 100644
> --- a/hw/arm/aspeed_ast1700.c
> +++ b/hw/arm/aspeed_ast1700.c
> @@ -10,15 +10,18 @@
>  #include "hw/boards.h"
>  #include "hw/qdev-core.h"
>  #include "qom/object.h"
> +#include "hw/qdev-properties.h"
>  #include "hw/arm/aspeed_ast1700.h"
>
>  #define AST2700_SOC_LTPI_SIZE        0x01000000
>
>  enum {
> +    ASPEED_AST1700_DEV_UART12,
>      ASPEED_AST1700_DEV_LTPI_CTRL,
>  };
>
>  static const hwaddr aspeed_ast1700_io_memmap[] = {
> +    [ASPEED_AST1700_DEV_UART12]    =  0x00C33B00,
>      [ASPEED_AST1700_DEV_LTPI_CTRL] =  0x00C34000,
>  };
>
> @@ -32,6 +35,17 @@ static void aspeed_ast1700_realize(DeviceState *dev, Error **errp)
>                         AST2700_SOC_LTPI_SIZE);
>      sysbus_init_mmio(sbd, &s->iomem);
>
> +    /* UART */
> +    qdev_prop_set_uint8(DEVICE(&s->uart), "regshift", 2);
> +    qdev_prop_set_uint32(DEVICE(&s->uart), "baudbase", 38400);
> +    qdev_prop_set_uint8(DEVICE(&s->uart), "endianness", DEVICE_LITTLE_ENDIAN);
> +    if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart), errp)) {
> +        return;
> +    }
> +    memory_region_add_subregion(&s->iomem,
> +                        aspeed_ast1700_io_memmap[ASPEED_AST1700_DEV_UART12],
> +                        sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart), 0));
> +
>      /* LTPI controller */
>      if (!sysbus_realize(SYS_BUS_DEVICE(&s->ltpi), errp)) {
>          return;
> @@ -45,6 +59,10 @@ static void aspeed_ast1700_instance_init(Object *obj)
>  {
>      AspeedAST1700SoCState *s = ASPEED_AST1700(obj);
>
> +    /* UART */
> +    object_initialize_child(obj, "uart[*]", &s->uart,
> +                            TYPE_SERIAL_MM);
> +
>      /* LTPI controller */
>      object_initialize_child(obj, "ltpi-ctrl",
>                              &s->ltpi, TYPE_ASPEED_LTPI);
> --
> 2.43.0
>