From: Ruslan Ruslichenko <Ruslan_Ruslichenko@epam.com>

Some platforms use combined irq type, in which case
only single interrupt line is used, instead of 4
different irq's for each type.

Add emulation support for combined irq mode.

This mode can be selected by platforms by setting
'combined_irq' property.

Signed-off-by: Ruslan Ruslichenko <Ruslan_Ruslichenko@epam.com>
---
 hw/arm/smmuv3.c         | 12 +++++++++++-
 include/hw/arm/smmuv3.h |  1 +
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index bcf8af8dc7..2e29ff952a 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -79,6 +79,10 @@ static void smmuv3_trigger_irq(SMMUv3State *s, SMMUIrq irq,
         break;
     }
     }
+
+    if (s->combined_irq)
+        irq = 0;
+
     if (pulse) {
             trace_smmuv3_trigger_irq(irq);
             qemu_irq_pulse(s->irq[irq]);
@@ -1850,8 +1854,9 @@ static const MemoryRegionOps smmu_mem_ops = {
 static void smmu_init_irq(SMMUv3State *s, SysBusDevice *dev)
 {
     int i;
+    int irq_num = s->combined_irq ? 1 : ARRAY_SIZE(s->irq);
 
-    for (i = 0; i < ARRAY_SIZE(s->irq); i++) {
+    for (i = 0; i < irq_num; i++) {
         sysbus_init_irq(dev, &s->irq[i]);
     }
 }
@@ -1977,6 +1982,11 @@ static const Property smmuv3_properties[] = {
      * Defaults to stage 1
      */
     DEFINE_PROP_STRING("stage", SMMUv3State, stage),
+    /*
+     * Use single IRQ line for each event type,
+     * instead of 4 different irq's
+     */
+    DEFINE_PROP_BOOL("combined_irq", SMMUv3State, combined_irq, false),
 };
 
 static void smmuv3_instance_init(Object *obj)
diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h
index d183a62766..cb8f7e0422 100644
--- a/include/hw/arm/smmuv3.h
+++ b/include/hw/arm/smmuv3.h
@@ -61,6 +61,7 @@ struct SMMUv3State {
     SMMUQueue eventq, cmdq;
 
     qemu_irq     irq[4];
+    bool         combined_irq;
     QemuMutex mutex;
     char *stage;
 };
-- 
2.43.0

On Tue, 23 Dec 2025 at 22:37, Ruslan Ruslichenko
<ruslichenko.r@gmail.com> wrote:
>
> From: Ruslan Ruslichenko <Ruslan_Ruslichenko@epam.com>
>
> Some platforms use combined irq type, in which case
> only single interrupt line is used, instead of 4
> different irq's for each type.
>
> Add emulation support for combined irq mode.
>
> This mode can be selected by platforms by setting
> 'combined_irq' property.

Which platforms?

The other way to approach this would be to have the
relevant SoC/platform models create a TYPE_OR_IRQ
or gate to wire the interrupts together.

thanks
-- PMM

On Sun, Dec 28, 2025 at 6:08 PM Peter Maydell <peter.maydell@linaro.org> wrote:
>
> On Tue, 23 Dec 2025 at 22:37, Ruslan Ruslichenko
> <ruslichenko.r@gmail.com> wrote:
> >
> > From: Ruslan Ruslichenko <Ruslan_Ruslichenko@epam.com>
> >
> > Some platforms use combined irq type, in which case
> > only single interrupt line is used, instead of 4
> > different irq's for each type.
> >
> > Add emulation support for combined irq mode.
> >
> > This mode can be selected by platforms by setting
> > 'combined_irq' property.
>
> Which platforms?

As I can see in ML Linux there is currently at least one platform
using such mode:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/xilinx/versal-net.dtsi#n1010

In our case we are working to emulate Renesas R-Car X5H SoC, which may
also use this configuration.

>
> The other way to approach this would be to have the
> relevant SoC/platform models create a TYPE_OR_IRQ
> or gate to wire the interrupts together.

Thank you for suggestion! We will try to implement this approach instead.

>
> thanks
> -- PMM

On Mon, 29 Dec 2025 at 21:21, Ruslan <ruslichenko.r@gmail.com> wrote:
>
> On Sun, Dec 28, 2025 at 6:08 PM Peter Maydell <peter.maydell@linaro.org> wrote:
> >
> > On Tue, 23 Dec 2025 at 22:37, Ruslan Ruslichenko
> > <ruslichenko.r@gmail.com> wrote:
> > >
> > > From: Ruslan Ruslichenko <Ruslan_Ruslichenko@epam.com>
> > >
> > > Some platforms use combined irq type, in which case
> > > only single interrupt line is used, instead of 4
> > > different irq's for each type.
> > >
> > > Add emulation support for combined irq mode.
> > >
> > > This mode can be selected by platforms by setting
> > > 'combined_irq' property.
> >
> > Which platforms?
>
> As I can see in ML Linux there is currently at least one platform
> using such mode:
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/xilinx/versal-net.dtsi#n1010
>
> In our case we are working to emulate Renesas R-Car X5H SoC, which may
> also use this configuration.
>
> >
> > The other way to approach this would be to have the
> > relevant SoC/platform models create a TYPE_OR_IRQ
> > or gate to wire the interrupts together.
>
> Thank you for suggestion! We will try to implement this approach instead.

It looks to me as if at least for Arm's SMMU implementations
they only have the multiple-interrupt outputs:
https://developer.arm.com/documentation/101542/0001/Signal-descriptions/TCU-signals/TCU-interrupt-signals?lang=en

and so an SoC which has a "combined" interrupt is presumably
doing it in the SoC with an OR gate or similar logic.

If the SoC you're modelling uses an SMMU implementation
where the SMMU itself provides the combined interrupt,
and you have the documentation for that, we could look at
whether it makes sense for QEMU's SMMU also to offer that.

Generally I find it works best if in QEMU we follow the
same pattern the hardware is using for where we put
functionality, whatever that is.

thanks
-- PMM