Introduce load/store helpers taking a MemOp argument (which can
include size and endianness). Use the -m suffix to differentiate
with others.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
docs/devel/loads-stores.rst | 10 ++++---
include/exec/memory_ldst_cached.h.inc | 30 ++++++++++++++++++++
include/system/memory_ldst_endian.h.inc | 4 +++
include/system/memory_ldst_phys_endian.h.inc | 10 +++++++
4 files changed, 50 insertions(+), 4 deletions(-)
diff --git a/docs/devel/loads-stores.rst b/docs/devel/loads-stores.rst
index c906c6509ee..9b8ee4a5d34 100644
--- a/docs/devel/loads-stores.rst
+++ b/docs/devel/loads-stores.rst
@@ -375,6 +375,7 @@ succeeded using a MemTxResult return code.
- ``w`` : 16 bits
- ``l`` : 32 bits
- ``q`` : 64 bits
+ - ``m`` : MO_SIZE
``endian``
- ``le`` : little endian
@@ -384,8 +385,8 @@ The ``_{endian}`` suffix is omitted for byte accesses.
Regexes for git grep:
- ``\<address_space_\(read\|write\|rw\)\>``
- - ``\<address_space_ldu\?[bwql]\(_[lb]e\)\?\>``
- - ``\<address_space_st[bwql]\(_[lb]e\)\?\>``
+ - ``\<address_space_ldu\?[bwlqm]\(_[lb]e\)\?\>``
+ - ``\<address_space_st[bwlqm]\(_[lb]e\)\?\>``
``address_space_write_rom``
~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -431,6 +432,7 @@ device doing the access has no way to report such an error.
- ``w`` : 16 bits
- ``l`` : 32 bits
- ``q`` : 64 bits
+ - ``m`` : MO_SIZE
``endian``
- ``le`` : little endian
@@ -439,8 +441,8 @@ device doing the access has no way to report such an error.
The ``_{endian}_`` infix is omitted for byte accesses.
Regexes for git grep:
- - ``\<ldu\?[bwlq]\(_[bl]e\)\?_phys\>``
- - ``\<st[bwlq]\(_[bl]e\)\?_phys\>``
+ - ``\<ldu\?[bwlqm]\(_[bl]e\)\?_phys\>``
+ - ``\<st[bwlqm]\(_[bl]e\)\?_phys\>``
``cpu_physical_memory_*``
~~~~~~~~~~~~~~~~~~~~~~~~~
diff --git a/include/exec/memory_ldst_cached.h.inc b/include/exec/memory_ldst_cached.h.inc
index d7834f852c4..21f89fe09fa 100644
--- a/include/exec/memory_ldst_cached.h.inc
+++ b/include/exec/memory_ldst_cached.h.inc
@@ -24,6 +24,21 @@
#define LD_P(size) \
glue(glue(ld, size), glue(ENDIANNESS, _p))
+static inline uint64_t ADDRESS_SPACE_LD_CACHED(m)(MemoryRegionCache *cache,
+ MemOp mop, hwaddr addr,
+ MemTxAttrs attrs,
+ MemTxResult *result)
+{
+ const unsigned size = memop_size(mop);
+ assert(addr < cache->len && size <= cache->len - addr);
+ fuzz_dma_read_cb(cache->xlat + addr, size, cache->mrs.mr);
+ if (likely(cache->ptr)) {
+ return LD_P(n)(cache->ptr + addr, size);
+ } else {
+ return ADDRESS_SPACE_LD_CACHED_SLOW(m)(cache, mop, addr, attrs, result);
+ }
+}
+
static inline uint16_t ADDRESS_SPACE_LD_CACHED(uw)(MemoryRegionCache *cache,
hwaddr addr, MemTxAttrs attrs, MemTxResult *result)
{
@@ -71,6 +86,21 @@ static inline uint64_t ADDRESS_SPACE_LD_CACHED(q)(MemoryRegionCache *cache,
#define ST_P(size) \
glue(glue(st, size), glue(ENDIANNESS, _p))
+static inline void ADDRESS_SPACE_ST_CACHED(m)(MemoryRegionCache *cache,
+ MemOp mop,
+ hwaddr addr, uint64_t val,
+ MemTxAttrs attrs,
+ MemTxResult *result)
+{
+ const unsigned size = memop_size(mop);
+ assert(addr < cache->len && size <= cache->len - addr);
+ if (likely(cache->ptr)) {
+ ST_P(n)(cache->ptr + addr, val, size);
+ } else {
+ ADDRESS_SPACE_ST_CACHED_SLOW(m)(cache, mop, addr, val, attrs, result);
+ }
+}
+
static inline void ADDRESS_SPACE_ST_CACHED(w)(MemoryRegionCache *cache,
hwaddr addr, uint16_t val, MemTxAttrs attrs, MemTxResult *result)
{
diff --git a/include/system/memory_ldst_endian.h.inc b/include/system/memory_ldst_endian.h.inc
index ec86e42afbc..9455b973663 100644
--- a/include/system/memory_ldst_endian.h.inc
+++ b/include/system/memory_ldst_endian.h.inc
@@ -20,12 +20,16 @@ uint32_t ADDRESS_SPACE_LD(l)(ARG1_DECL, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result);
uint64_t ADDRESS_SPACE_LD(q)(ARG1_DECL, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result);
+uint64_t ADDRESS_SPACE_LD(m)(ARG1_DECL, MemOp mop, hwaddr addr,
+ MemTxAttrs attrs, MemTxResult *result);
void ADDRESS_SPACE_ST(w)(ARG1_DECL, hwaddr addr, uint16_t val,
MemTxAttrs attrs, MemTxResult *result);
void ADDRESS_SPACE_ST(l)(ARG1_DECL, hwaddr addr, uint32_t val,
MemTxAttrs attrs, MemTxResult *result);
void ADDRESS_SPACE_ST(q)(ARG1_DECL, hwaddr addr, uint64_t val,
MemTxAttrs attrs, MemTxResult *result);
+void ADDRESS_SPACE_ST(m)(ARG1_DECL, MemOp mop, hwaddr addr, uint64_t val,
+ MemTxAttrs attrs, MemTxResult *result);
#undef ADDRESS_SPACE_LD
#undef ADDRESS_SPACE_ST
diff --git a/include/system/memory_ldst_phys_endian.h.inc b/include/system/memory_ldst_phys_endian.h.inc
index 9603d886867..659f38f7112 100644
--- a/include/system/memory_ldst_phys_endian.h.inc
+++ b/include/system/memory_ldst_phys_endian.h.inc
@@ -34,6 +34,11 @@ static inline uint64_t LD_PHYS(q)(ARG1_DECL, hwaddr addr)
return ADDRESS_SPACE_LD(q)(ARG1, addr, MEMTXATTRS_UNSPECIFIED, NULL);
}
+static inline uint32_t LD_PHYS(m)(ARG1_DECL, MemOp op, hwaddr addr)
+{
+ return ADDRESS_SPACE_LD(m)(ARG1, op, addr, MEMTXATTRS_UNSPECIFIED, NULL);
+}
+
static inline void ST_PHYS(w)(ARG1_DECL, hwaddr addr, uint16_t val)
{
ADDRESS_SPACE_ST(w)(ARG1, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
@@ -49,6 +54,11 @@ static inline void ST_PHYS(q)(ARG1_DECL, hwaddr addr, uint64_t val)
ADDRESS_SPACE_ST(q)(ARG1, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
}
+static inline void ST_PHYS(m)(ARG1_DECL, MemOp op, hwaddr addr, uint64_t val)
+{
+ ADDRESS_SPACE_ST(m)(ARG1, op, addr, val, MEMTXATTRS_UNSPECIFIED, NULL);
+}
+
#undef LD_PHYS
#undef ST_PHYS
#undef ADDRESS_SPACE_LD
--
2.52.0
On 12/19/25 08:28, Philippe Mathieu-Daudé wrote: > Introduce load/store helpers taking a MemOp argument (which can > include size and endianness). Use the -m suffix to differentiate > with others. > > Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org> > --- > docs/devel/loads-stores.rst | 10 ++++--- > include/exec/memory_ldst_cached.h.inc | 30 ++++++++++++++++++++ > include/system/memory_ldst_endian.h.inc | 4 +++ > include/system/memory_ldst_phys_endian.h.inc | 10 +++++++ > 4 files changed, 50 insertions(+), 4 deletions(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
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