Power Hypervisor code requires access to the SECURITY_SWITCH
XSCOM register at MMIO address 0x80028 (scom address 0x10005).
Adding basic read support for now so that is doesn't cause
error messages to be posted.

Signed-off-by: Glenn Miles <milesg@linux.ibm.com>
Signed-off-by: Caleb Schlossin <calebs@linux.ibm.com>
---
 hw/ppc/pnv_xscom.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c
index fbfec829d5..308430def7 100644
--- a/hw/ppc/pnv_xscom.c
+++ b/hw/ppc/pnv_xscom.c
@@ -61,6 +61,8 @@ static uint32_t pnv_xscom_pcba(PnvChip *chip, uint64_t addr)
 static uint64_t xscom_read_default(PnvChip *chip, uint32_t pcba)
 {
     switch (pcba) {
+    case 0x10005:       /* SECURITY SWITCH */
+        return 0;
     case 0xf000f:
         return PNV_CHIP_GET_CLASS(chip)->chip_cfam_id;
     case 0x18002:       /* ECID2 */
-- 
2.47.3

On 25/12/18 02:03PM, Caleb Schlossin wrote:
> Power Hypervisor code requires access to the SECURITY_SWITCH
> XSCOM register at MMIO address 0x80028 (scom address 0x10005).
> Adding basic read support for now so that is doesn't cause
> error messages to be posted.
> 
> Signed-off-by: Glenn Miles <milesg@linux.ibm.com>
> Signed-off-by: Caleb Schlossin <calebs@linux.ibm.com>
> ---
>  hw/ppc/pnv_xscom.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c
> index fbfec829d5..308430def7 100644
> --- a/hw/ppc/pnv_xscom.c
> +++ b/hw/ppc/pnv_xscom.c
> @@ -61,6 +61,8 @@ static uint32_t pnv_xscom_pcba(PnvChip *chip, uint64_t addr)
>  static uint64_t xscom_read_default(PnvChip *chip, uint32_t pcba)
>  {
>      switch (pcba) {
> +    case 0x10005:       /* SECURITY SWITCH */
> +        return 0;

Looks okay to me, and returning 0 here makes sense.

Reviewed-by: Aditya Gupta <adityag@linux.ibm.com>

Thanks,
- Aditya G

>      case 0xf000f:
>          return PNV_CHIP_GET_CLASS(chip)->chip_cfam_id;
>      case 0x18002:       /* ECID2 */
> -- 
> 2.47.3
>

Reviewed-by: Glenn Miles <milesg@linux.ibm.com>

Thanks,

Glenn

On Thu, 2025-12-18 at 14:03 -0600, Caleb Schlossin wrote:
> Power Hypervisor code requires access to the SECURITY_SWITCH
> XSCOM register at MMIO address 0x80028 (scom address 0x10005).
> Adding basic read support for now so that is doesn't cause
> error messages to be posted.
> 
> Signed-off-by: Glenn Miles <milesg@linux.ibm.com>
> Signed-off-by: Caleb Schlossin <calebs@linux.ibm.com>
> ---
>  hw/ppc/pnv_xscom.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c
> index fbfec829d5..308430def7 100644
> --- a/hw/ppc/pnv_xscom.c
> +++ b/hw/ppc/pnv_xscom.c
> @@ -61,6 +61,8 @@ static uint32_t pnv_xscom_pcba(PnvChip *chip, uint64_t addr)
>  static uint64_t xscom_read_default(PnvChip *chip, uint32_t pcba)
>  {
>      switch (pcba) {
> +    case 0x10005:       /* SECURITY SWITCH */
> +        return 0;
>      case 0xf000f:
>          return PNV_CHIP_GET_CLASS(chip)->chip_cfam_id;
>      case 0x18002:       /* ECID2 */

Reviewed-by: Chalapathi V <chalapathi.v@linux.ibm.com> 
<mailto:milesg@linux.ibm.com>


On 19/12/25 1:33 am, Caleb Schlossin wrote:
> Power Hypervisor code requires access to the SECURITY_SWITCH
> XSCOM register at MMIO address 0x80028 (scom address 0x10005).
> Adding basic read support for now so that is doesn't cause
> error messages to be posted.
>
> Signed-off-by: Glenn Miles<milesg@linux.ibm.com>
> Signed-off-by: Caleb Schlossin<calebs@linux.ibm.com>
> ---
>   hw/ppc/pnv_xscom.c | 2 ++
>   1 file changed, 2 insertions(+)
>
> diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c
> index fbfec829d5..308430def7 100644
> --- a/hw/ppc/pnv_xscom.c
> +++ b/hw/ppc/pnv_xscom.c
> @@ -61,6 +61,8 @@ static uint32_t pnv_xscom_pcba(PnvChip *chip, uint64_t addr)
>   static uint64_t xscom_read_default(PnvChip *chip, uint32_t pcba)
>   {
>       switch (pcba) {
> +    case 0x10005:       /* SECURITY SWITCH */
> +        return 0;
>       case 0xf000f:
>           return PNV_CHIP_GET_CLASS(chip)->chip_cfam_id;
>       case 0x18002:       /* ECID2 */