Signed-off-by: Aleksandr Sergeev <sergeev0xef@gmail.com>
Reviewed-by: Alexei Filippov <halip0503@gmail.com>
---
 target/riscv/machine.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/target/riscv/machine.c b/target/riscv/machine.c
index 5083bbb1f2..2f6a5fc25c 100644
--- a/target/riscv/machine.c
+++ b/target/riscv/machine.c
@@ -474,6 +474,10 @@ const VMStateDescription vmstate_riscv_cpu = {
         VMSTATE_UINT32(env.mcounteren, RISCVCPU),
         VMSTATE_UINT32(env.scountinhibit, RISCVCPU),
         VMSTATE_UINT32(env.mcountinhibit, RISCVCPU),
+        VMSTATE_UINTTL(env.mcyclecfg, RISCVCPU),
+        VMSTATE_UINTTL(env.mcyclecfgh, RISCVCPU),
+        VMSTATE_UINTTL(env.minstretcfg, RISCVCPU),
+        VMSTATE_UINTTL(env.minstretcfgh, RISCVCPU),
         VMSTATE_STRUCT_ARRAY(env.pmu_ctrs, RISCVCPU, RV_MAX_MHPMCOUNTERS, 0,
                              vmstate_pmu_ctr_state, PMUCTRState),
         VMSTATE_UINTTL_ARRAY(env.mhpmevent_val, RISCVCPU, RV_MAX_MHPMEVENTS),
-- 
2.51.0