KVM fields of CPURISCVState are now always exposed as CONFIG_KVM cannot
be used in common code.

riscv_cpu_mxl() is changed to return CPURISCVState::misa_mxl
unconditionally, as use of target_riscv64() would result in an extra
load and compare with TargetInfo::target_arch.  We might as well just
perform a single load.  Likewise, for cpu_recompute_xl(),
cpu_address_xl(), and riscv_cpu_sxl(), we opt for returning the
corresponding CPURISCVState field with ifdefs for system mode adding
extra conditions.

Signed-off-by: Anton Johansson <anjo@rev.ng>
---
 target/riscv/cpu.h | 36 ++++++++----------------------------
 1 file changed, 8 insertions(+), 28 deletions(-)

diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index da2bc554d3..946665d9ed 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -497,14 +497,12 @@ struct CPUArchState {
     hwaddr kernel_addr;
     hwaddr fdt_addr;
 
-#ifdef CONFIG_KVM
     /* kvm timer */
     bool kvm_timer_dirty;
     uint64_t kvm_timer_time;
     uint64_t kvm_timer_compare;
     uint64_t kvm_timer_state;
     uint64_t kvm_timer_frequency;
-#endif /* CONFIG_KVM */
 
     /* RNMI */
     uint64_t mnscratch;
@@ -703,14 +701,10 @@ FIELD(TB_FLAGS, BCFI_ENABLED, 28, 1)
 FIELD(TB_FLAGS, PM_PMM, 29, 2)
 FIELD(TB_FLAGS, PM_SIGNEXTEND, 31, 1)
 
-#ifdef TARGET_RISCV32
-#define riscv_cpu_mxl(env)  ((void)(env), MXL_RV32)
-#else
 static inline RISCVMXL riscv_cpu_mxl(CPURISCVState *env)
 {
     return env->misa_mxl;
 }
-#endif
 #define riscv_cpu_mxl_bits(env) (1UL << (4 + riscv_cpu_mxl(env)))
 
 static inline const RISCVCPUConfig *riscv_cpu_cfg(CPURISCVState *env)
@@ -754,9 +748,6 @@ static inline RISCVMXL cpu_get_xl(CPURISCVState *env, privilege_mode_t mode)
 }
 #endif
 
-#if defined(TARGET_RISCV32)
-#define cpu_recompute_xl(env)  ((void)(env), MXL_RV32)
-#else
 static inline RISCVMXL cpu_recompute_xl(CPURISCVState *env)
 {
 #if !defined(CONFIG_USER_ONLY)
@@ -765,43 +756,32 @@ static inline RISCVMXL cpu_recompute_xl(CPURISCVState *env)
     return env->misa_mxl;
 #endif
 }
-#endif
 
-#if defined(TARGET_RISCV32)
-#define cpu_address_xl(env)  ((void)(env), MXL_RV32)
-#else
 static inline RISCVMXL cpu_address_xl(CPURISCVState *env)
 {
-#ifdef CONFIG_USER_ONLY
-    return env->xl;
-#else
-    int mode = cpu_address_mode(env);
-
-    return cpu_get_xl(env, mode);
+#ifndef CONFIG_USER_ONLY
+    if (target_riscv64()) {
+        int mode = cpu_address_mode(env);
+        return cpu_get_xl(env, mode);
+    }
 #endif
+    return env->xl;
 }
-#endif
 
 static inline int riscv_cpu_xlen(CPURISCVState *env)
 {
     return 16 << env->xl;
 }
 
-#ifdef TARGET_RISCV32
-#define riscv_cpu_sxl(env)  ((void)(env), MXL_RV32)
-#else
 static inline RISCVMXL riscv_cpu_sxl(CPURISCVState *env)
 {
-#ifdef CONFIG_USER_ONLY
-    return env->misa_mxl;
-#else
+#ifndef CONFIG_USER_ONLY
     if (env->misa_mxl != MXL_RV32) {
         return get_field(env->mstatus, MSTATUS64_SXL);
     }
 #endif
-    return MXL_RV32;
+    return env->misa_mxl;
 }
-#endif
 
 static inline bool riscv_cpu_allow_16bit_insn(const RISCVCPUConfig *cfg,
                                               uint32_t priv_ver,

-- 
2.51.0

On 12/16/25 3:51 PM, Anton Johansson wrote:
> KVM fields of CPURISCVState are now always exposed as CONFIG_KVM cannot
> be used in common code.
> 
> riscv_cpu_mxl() is changed to return CPURISCVState::misa_mxl
> unconditionally, as use of target_riscv64() would result in an extra
> load and compare with TargetInfo::target_arch.  We might as well just
> perform a single load.  Likewise, for cpu_recompute_xl(),
> cpu_address_xl(), and riscv_cpu_sxl(), we opt for returning the
> corresponding CPURISCVState field with ifdefs for system mode adding
> extra conditions.
> 
> Signed-off-by: Anton Johansson <anjo@rev.ng>
> ---
>   target/riscv/cpu.h | 36 ++++++++----------------------------
>   1 file changed, 8 insertions(+), 28 deletions(-)
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>