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[PATCH 6/6] hw/ppc: pnv_chiptod.c add vmstate support

Caleb Schlossin posted 6 patches 2 days, 8 hours ago
Maintainers: Nicholas Piggin <npiggin@gmail.com>, Aditya Gupta <adityag@linux.ibm.com>, Glenn Miles <milesg@linux.ibm.com>, Alistair Francis <alistair@alistair23.me>
[PATCH 6/6] hw/ppc: pnv_chiptod.c add vmstate support
Posted by Caleb Schlossin 2 days, 8 hours ago 
- Added pre_save and post_load methods to handle slave_pc_target and tod_state

Signed-off-by: Angelo Jaramillo <angeloj@linux.ibm.com>
Signed-off-by: Caleb Schlossin <calebs@linux.ibm.com>
---
 hw/ppc/pnv_chiptod.c         | 38 ++++++++++++++++++++++++++++++++++++
 include/hw/ppc/pnv_chiptod.h |  2 ++
 2 files changed, 40 insertions(+)

diff --git a/hw/ppc/pnv_chiptod.c b/hw/ppc/pnv_chiptod.c
index f887a18cde..9dc5942ca0 100644
--- a/hw/ppc/pnv_chiptod.c
+++ b/hw/ppc/pnv_chiptod.c
@@ -37,6 +37,7 @@
 #include "hw/ppc/pnv_core.h"
 #include "hw/ppc/pnv_xscom.h"
 #include "hw/ppc/pnv_chiptod.h"
+#include "migration/vmstate.h"
 #include "trace.h"
 
 #include <libfdt.h>
@@ -341,6 +342,8 @@ static void pnv_chiptod_xscom_write(void *opaque, hwaddr addr,
                           " TOD_TX_TTYPE_CTRL_REG val 0x%" PRIx64
                           " invalid slave address\n", val);
         }
+        /* Write slave_pc_target to a uint64_t variable for vmstate support. */
+        chiptod->tx_ttype_ctrl = val;
         break;
     case TOD_ERROR_REG:
         chiptod->tod_error &= ~val;
@@ -613,6 +616,40 @@ static void pnv_chiptod_unrealize(DeviceState *dev)
     qemu_unregister_reset(pnv_chiptod_reset, chiptod);
 }
 
+static int vmstate_pnv_chiptod_pre_save(void *opaque)
+{
+    PnvChipTOD *chiptod = PNV_CHIPTOD(opaque);
+    chiptod->tod_state_val = (uint8_t)chiptod->tod_state;
+    return 0;
+}
+
+static int vmstate_pnv_chiptod_post_load(void *opaque)
+{
+    PnvChipTOD *chiptod = PNV_CHIPTOD(opaque);
+    if (chiptod->tx_ttype_ctrl != 0) {
+        pnv_chiptod_xscom_write(chiptod, TOD_TX_TTYPE_CTRL_REG << 3,
+                                chiptod->tx_ttype_ctrl, 8);
+    }
+    chiptod->tod_state = (enum tod_state)chiptod->tod_state_val;
+    return 0;
+}
+
+static const VMStateDescription pnv_chiptod_vmstate = {
+    .name = TYPE_PNV_CHIPTOD,
+    .version_id = 1,
+    .pre_save = vmstate_pnv_chiptod_pre_save,
+    .pre_load = vmstate_pnv_chiptod_post_load,
+    .fields = (const VMStateField[]) {
+        VMSTATE_BOOL(primary, PnvChipTOD),
+        VMSTATE_BOOL(secondary, PnvChipTOD),
+        VMSTATE_UINT64(tod_error, PnvChipTOD),
+        VMSTATE_UINT64(pss_mss_ctrl_reg, PnvChipTOD),
+        VMSTATE_UINT64(tx_ttype_ctrl, PnvChipTOD),
+        VMSTATE_UINT8(tod_state_val, PnvChipTOD),
+        VMSTATE_END_OF_LIST(),
+    },
+};
+
 static void pnv_chiptod_class_init(ObjectClass *klass, const void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
@@ -621,6 +658,7 @@ static void pnv_chiptod_class_init(ObjectClass *klass, const void *data)
     dc->unrealize = pnv_chiptod_unrealize;
     dc->desc = "PowerNV ChipTOD Controller";
     dc->user_creatable = false;
+    dc->vmsd = &pnv_chiptod_vmstate;
 }
 
 static const TypeInfo pnv_chiptod_type_info = {
diff --git a/include/hw/ppc/pnv_chiptod.h b/include/hw/ppc/pnv_chiptod.h
index 466b06560a..3e5e3b02b2 100644
--- a/include/hw/ppc/pnv_chiptod.h
+++ b/include/hw/ppc/pnv_chiptod.h
@@ -41,6 +41,8 @@ struct PnvChipTOD {
     uint64_t tod_error;
     uint64_t pss_mss_ctrl_reg;
     PnvCore *slave_pc_target;
+    uint64_t tx_ttype_ctrl;
+    uint8_t tod_state_val;
 };
 
 struct PnvChipTODClass {
-- 
2.47.3
Re: [PATCH 6/6] hw/ppc: pnv_chiptod.c add vmstate support
Posted by Miles Glenn 1 day, 13 hours ago 
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>

On Thu, 2025-12-11 at 16:09 -0600, Caleb Schlossin wrote:
> - Added pre_save and post_load methods to handle slave_pc_target and tod_state
> 
> Signed-off-by: Angelo Jaramillo <angeloj@linux.ibm.com>
> Signed-off-by: Caleb Schlossin <calebs@linux.ibm.com>
> ---
>  hw/ppc/pnv_chiptod.c         | 38 ++++++++++++++++++++++++++++++++++++
>  include/hw/ppc/pnv_chiptod.h |  2 ++
>  2 files changed, 40 insertions(+)
> 
> diff --git a/hw/ppc/pnv_chiptod.c b/hw/ppc/pnv_chiptod.c
> index f887a18cde..9dc5942ca0 100644
> --- a/hw/ppc/pnv_chiptod.c
> +++ b/hw/ppc/pnv_chiptod.c
> @@ -37,6 +37,7 @@
>  #include "hw/ppc/pnv_core.h"
>  #include "hw/ppc/pnv_xscom.h"
>  #include "hw/ppc/pnv_chiptod.h"
> +#include "migration/vmstate.h"
>  #include "trace.h"
>  
>  #include <libfdt.h>
> @@ -341,6 +342,8 @@ static void pnv_chiptod_xscom_write(void *opaque, hwaddr addr,
>                            " TOD_TX_TTYPE_CTRL_REG val 0x%" PRIx64
>                            " invalid slave address\n", val);
>          }
> +        /* Write slave_pc_target to a uint64_t variable for vmstate support. */
> +        chiptod->tx_ttype_ctrl = val;
>          break;
>      case TOD_ERROR_REG:
>          chiptod->tod_error &= ~val;
> @@ -613,6 +616,40 @@ static void pnv_chiptod_unrealize(DeviceState *dev)
>      qemu_unregister_reset(pnv_chiptod_reset, chiptod);
>  }
>  
> +static int vmstate_pnv_chiptod_pre_save(void *opaque)
> +{
> +    PnvChipTOD *chiptod = PNV_CHIPTOD(opaque);
> +    chiptod->tod_state_val = (uint8_t)chiptod->tod_state;
> +    return 0;
> +}
> +
> +static int vmstate_pnv_chiptod_post_load(void *opaque)
> +{
> +    PnvChipTOD *chiptod = PNV_CHIPTOD(opaque);
> +    if (chiptod->tx_ttype_ctrl != 0) {
> +        pnv_chiptod_xscom_write(chiptod, TOD_TX_TTYPE_CTRL_REG << 3,
> +                                chiptod->tx_ttype_ctrl, 8);
> +    }
> +    chiptod->tod_state = (enum tod_state)chiptod->tod_state_val;
> +    return 0;
> +}
> +
> +static const VMStateDescription pnv_chiptod_vmstate = {
> +    .name = TYPE_PNV_CHIPTOD,
> +    .version_id = 1,
> +    .pre_save = vmstate_pnv_chiptod_pre_save,
> +    .pre_load = vmstate_pnv_chiptod_post_load,
> +    .fields = (const VMStateField[]) {
> +        VMSTATE_BOOL(primary, PnvChipTOD),
> +        VMSTATE_BOOL(secondary, PnvChipTOD),
> +        VMSTATE_UINT64(tod_error, PnvChipTOD),
> +        VMSTATE_UINT64(pss_mss_ctrl_reg, PnvChipTOD),
> +        VMSTATE_UINT64(tx_ttype_ctrl, PnvChipTOD),
> +        VMSTATE_UINT8(tod_state_val, PnvChipTOD),
> +        VMSTATE_END_OF_LIST(),
> +    },
> +};
> +
>  static void pnv_chiptod_class_init(ObjectClass *klass, const void *data)
>  {
>      DeviceClass *dc = DEVICE_CLASS(klass);
> @@ -621,6 +658,7 @@ static void pnv_chiptod_class_init(ObjectClass *klass, const void *data)
>      dc->unrealize = pnv_chiptod_unrealize;
>      dc->desc = "PowerNV ChipTOD Controller";
>      dc->user_creatable = false;
> +    dc->vmsd = &pnv_chiptod_vmstate;
>  }
>  
>  static const TypeInfo pnv_chiptod_type_info = {
> diff --git a/include/hw/ppc/pnv_chiptod.h b/include/hw/ppc/pnv_chiptod.h
> index 466b06560a..3e5e3b02b2 100644
> --- a/include/hw/ppc/pnv_chiptod.h
> +++ b/include/hw/ppc/pnv_chiptod.h
> @@ -41,6 +41,8 @@ struct PnvChipTOD {
>      uint64_t tod_error;
>      uint64_t pss_mss_ctrl_reg;
>      PnvCore *slave_pc_target;
> +    uint64_t tx_ttype_ctrl;
> +    uint8_t tod_state_val;
>  };
>  
>  struct PnvChipTODClass {

Patchew 2.1-devel-b67e4c2

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