[PATCH 5/6] hw/ppc: pnv_core.c add vmstate support

Caleb Schlossin posted 6 patches 2 days, 8 hours ago
Maintainers: Nicholas Piggin <npiggin@gmail.com>, Aditya Gupta <adityag@linux.ibm.com>, Glenn Miles <milesg@linux.ibm.com>, Alistair Francis <alistair@alistair23.me>
[PATCH 5/6] hw/ppc: pnv_core.c add vmstate support
Posted by Caleb Schlossin 2 days, 8 hours ago
- Removed VMSTATE for big_core, lpar_per_core, hwid, hrmor, and pir.
- Removed quad_id vmstate

Signed-off-by: Angelo Jaramillo <angeloj@linux.ibm.com>
Signed-off-by: Caleb Schlossin <calebs@linux.ibm.com>
---
 hw/ppc/pnv_core.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
index fb2dfc7ba2..03b64f0013 100644
--- a/hw/ppc/pnv_core.c
+++ b/hw/ppc/pnv_core.c
@@ -31,6 +31,7 @@
 #include "hw/ppc/xics.h"
 #include "hw/qdev-properties.h"
 #include "helper_regs.h"
+#include "migration/vmstate.h"
 
 static const char *pnv_core_cpu_typename(PnvCore *pc)
 {
@@ -478,6 +479,15 @@ static void pnv_core_power11_class_init(ObjectClass *oc, const void *data)
     pnv_core_power10_class_init(oc, data);
 }
 
+static const VMStateDescription pnv_core_vmstate = {
+    .name = TYPE_PNV_CORE,
+    .version_id = 1,
+    .fields = (const VMStateField[]) {
+        VMSTATE_UINT64_ARRAY(scratch, PnvCore, 8),
+        VMSTATE_END_OF_LIST(),
+    },
+};
+
 static void pnv_core_class_init(ObjectClass *oc, const void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(oc);
@@ -486,6 +496,7 @@ static void pnv_core_class_init(ObjectClass *oc, const void *data)
     dc->unrealize = pnv_core_unrealize;
     device_class_set_props(dc, pnv_core_properties);
     dc->user_creatable = false;
+    dc->vmsd = &pnv_core_vmstate;
 }
 
 #define DEFINE_PNV_CORE_TYPE(family, cpu_model) \
@@ -737,12 +748,23 @@ static void pnv_quad_power11_class_init(ObjectClass *oc, const void *data)
     pnv_quad_power10_class_init(oc, data);
 }
 
+static const VMStateDescription pnv_quad_vmstate = {
+    .name = TYPE_PNV_QUAD,
+    .version_id = 1,
+    .fields = (const VMStateField[]) {
+        VMSTATE_BOOL(special_wakeup_done, PnvQuad),
+        VMSTATE_BOOL_ARRAY(special_wakeup, PnvQuad, 4),
+        VMSTATE_END_OF_LIST(),
+    },
+};
+
 static void pnv_quad_class_init(ObjectClass *oc, const void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(oc);
 
     device_class_set_props(dc, pnv_quad_properties);
     dc->user_creatable = false;
+    dc->vmsd = &pnv_quad_vmstate;
 }
 
 static const TypeInfo pnv_quad_infos[] = {
-- 
2.47.3
Re: [PATCH 5/6] hw/ppc: pnv_core.c add vmstate support
Posted by Miles Glenn 1 day, 13 hours ago
On Thu, 2025-12-11 at 16:09 -0600, Caleb Schlossin wrote:
> - Removed VMSTATE for big_core, lpar_per_core, hwid, hrmor, and pir.
> - Removed quad_id vmstate
> 

The commit title and description don't seem to match.  This commit is
only adding vmstate and not removing anything.

-Glenn

> Signed-off-by: Angelo Jaramillo <angeloj@linux.ibm.com>
> Signed-off-by: Caleb Schlossin <calebs@linux.ibm.com>
> ---
>  hw/ppc/pnv_core.c | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
> 
> diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
> index fb2dfc7ba2..03b64f0013 100644
> --- a/hw/ppc/pnv_core.c
> +++ b/hw/ppc/pnv_core.c
> @@ -31,6 +31,7 @@
>  #include "hw/ppc/xics.h"
>  #include "hw/qdev-properties.h"
>  #include "helper_regs.h"
> +#include "migration/vmstate.h"
>  
>  static const char *pnv_core_cpu_typename(PnvCore *pc)
>  {
> @@ -478,6 +479,15 @@ static void pnv_core_power11_class_init(ObjectClass *oc, const void *data)
>      pnv_core_power10_class_init(oc, data);
>  }
>  
> +static const VMStateDescription pnv_core_vmstate = {
> +    .name = TYPE_PNV_CORE,
> +    .version_id = 1,
> +    .fields = (const VMStateField[]) {
> +        VMSTATE_UINT64_ARRAY(scratch, PnvCore, 8),
> +        VMSTATE_END_OF_LIST(),
> +    },
> +};
> +
>  static void pnv_core_class_init(ObjectClass *oc, const void *data)
>  {
>      DeviceClass *dc = DEVICE_CLASS(oc);
> @@ -486,6 +496,7 @@ static void pnv_core_class_init(ObjectClass *oc, const void *data)
>      dc->unrealize = pnv_core_unrealize;
>      device_class_set_props(dc, pnv_core_properties);
>      dc->user_creatable = false;
> +    dc->vmsd = &pnv_core_vmstate;
>  }
>  
>  #define DEFINE_PNV_CORE_TYPE(family, cpu_model) \
> @@ -737,12 +748,23 @@ static void pnv_quad_power11_class_init(ObjectClass *oc, const void *data)
>      pnv_quad_power10_class_init(oc, data);
>  }
>  
> +static const VMStateDescription pnv_quad_vmstate = {
> +    .name = TYPE_PNV_QUAD,
> +    .version_id = 1,
> +    .fields = (const VMStateField[]) {
> +        VMSTATE_BOOL(special_wakeup_done, PnvQuad),
> +        VMSTATE_BOOL_ARRAY(special_wakeup, PnvQuad, 4),
> +        VMSTATE_END_OF_LIST(),
> +    },
> +};
> +
>  static void pnv_quad_class_init(ObjectClass *oc, const void *data)
>  {
>      DeviceClass *dc = DEVICE_CLASS(oc);
>  
>      device_class_set_props(dc, pnv_quad_properties);
>      dc->user_creatable = false;
> +    dc->vmsd = &pnv_quad_vmstate;
>  }
>  
>  static const TypeInfo pnv_quad_infos[] = {