[PATCH v2 0/4] hw/sd: Improve performance of read/write/erase

Christian Speich posted 4 patches 2 months ago
Failed in applying to current master (apply log)
There is a newer version of this series
hw/sd/core.c       |  16 +--
hw/sd/sd.c         | 308 +++++++++++++++++++++++++++++++++++++++++------------
hw/sd/sdhci.c      | 102 ++++++++++--------
include/hw/sd/sd.h |  13 +--
4 files changed, 307 insertions(+), 132 deletions(-)
[PATCH v2 0/4] hw/sd: Improve performance of read/write/erase
Posted by Christian Speich 2 months ago
This patch series improves the performance of read/write/erase operations
on sdcards.

This is done by increasing the maximum buffer size that is worked on.
From 1 byte (master) to 512 bytes (first commit) to larger than 512
(adma commit).

Testing on my system with fio I see the following rough performance 
values in MiB/s.

              read write readwrite 
       master:   6     6     3/  3
 first commit:  51    43    23/ 23
second commit: 392   180   144/143

Tested on a 2GiB raw image with:
  fio --filename=/dev/mmcblk0 --direct=1 --runtime=60 --time_based --bs=128k --rw={mode}

The adma values are somewhat unstable but always >100MiB/s, I'm not sure
why but I guess it has something to do with the host side caching.

The third commit fixes the DATA_STAT_AFTER_ERASE bit in SCR and
introduces an option to allow to erase blocks to 0x00.

The fourth commit optimizes block erase when erase-blocks-as-zero=true
is used, by passing the zeroing request down the to the block device.
Erasing 2GiB now takes 0.1s instead of 26s.

Signed-off-by: Christian Speich <c.speich@avm.de>
---
Changes in v2:
- Properly set DATA_STAT_AFTER_ERASE in SCR
- Add erase-blocks-as-zero option to allow the user to switch between
  0x00 and 0xFF for erased blocks.
- Link to v1: https://lore.kernel.org/qemu-devel/20250919-sdcard-performance-b4-v1-0-e1037e481a19@avm.de

---
Christian Speich (4):
      hw/sd: Switch from byte-wise to buf+len read/writes
      hw/sd/sdhci: Don't use bounce buffer for ADMA
      hw/sd/sdcard: Add erase-blocks-as-zero option.
      hw/sd/sdcard: Optimize erase blocks as zero.

 hw/sd/core.c       |  16 +--
 hw/sd/sd.c         | 308 +++++++++++++++++++++++++++++++++++++++++------------
 hw/sd/sdhci.c      | 102 ++++++++++--------
 include/hw/sd/sd.h |  13 +--
 4 files changed, 307 insertions(+), 132 deletions(-)
---
base-commit: e7c1e8043a69c5a8efa39d4f9d111f7c72c076e6
change-id: 20250912-sdcard-performance-b4-d908bbb5a004

Best regards,
-- 
Christian Speich <c.speich@avm.de>
Re: [PATCH v2 0/4] hw/sd: Improve performance of read/write/erase
Posted by Christian Speich 2 weeks, 5 days ago
ping?

I'll rebase it soon as it won't apply cleanly anymore, but I'd like to know if this
patch is generally going in an right direction?

Greetings,
Christian

On Tue, Dec 02, 2025 at 03:39:30PM +0100, Christian Speich wrote:
> This patch series improves the performance of read/write/erase operations
> on sdcards.
> 
> This is done by increasing the maximum buffer size that is worked on.
> >From 1 byte (master) to 512 bytes (first commit) to larger than 512
> (adma commit).
> 
> Testing on my system with fio I see the following rough performance 
> values in MiB/s.
> 
>               read write readwrite 
>        master:   6     6     3/  3
>  first commit:  51    43    23/ 23
> second commit: 392   180   144/143
> 
> Tested on a 2GiB raw image with:
>   fio --filename=/dev/mmcblk0 --direct=1 --runtime=60 --time_based --bs=128k --rw={mode}
> 
> The adma values are somewhat unstable but always >100MiB/s, I'm not sure
> why but I guess it has something to do with the host side caching.
> 
> The third commit fixes the DATA_STAT_AFTER_ERASE bit in SCR and
> introduces an option to allow to erase blocks to 0x00.
> 
> The fourth commit optimizes block erase when erase-blocks-as-zero=true
> is used, by passing the zeroing request down the to the block device.
> Erasing 2GiB now takes 0.1s instead of 26s.
> 
> Signed-off-by: Christian Speich <c.speich@avm.de>
> ---
> Changes in v2:
> - Properly set DATA_STAT_AFTER_ERASE in SCR
> - Add erase-blocks-as-zero option to allow the user to switch between
>   0x00 and 0xFF for erased blocks.
> - Link to v1: https://lore.kernel.org/qemu-devel/20250919-sdcard-performance-b4-v1-0-e1037e481a19@avm.de
> 
> ---
> Christian Speich (4):
>       hw/sd: Switch from byte-wise to buf+len read/writes
>       hw/sd/sdhci: Don't use bounce buffer for ADMA
>       hw/sd/sdcard: Add erase-blocks-as-zero option.
>       hw/sd/sdcard: Optimize erase blocks as zero.
> 
>  hw/sd/core.c       |  16 +--
>  hw/sd/sd.c         | 308 +++++++++++++++++++++++++++++++++++++++++------------
>  hw/sd/sdhci.c      | 102 ++++++++++--------
>  include/hw/sd/sd.h |  13 +--
>  4 files changed, 307 insertions(+), 132 deletions(-)
> ---
> base-commit: e7c1e8043a69c5a8efa39d4f9d111f7c72c076e6
> change-id: 20250912-sdcard-performance-b4-d908bbb5a004
> 
> Best regards,
> -- 
> Christian Speich <c.speich@avm.de>
> 
>
Re: [PATCH v2 0/4] hw/sd: Improve performance of read/write/erase
Posted by Philippe Mathieu-Daudé 5 days, 10 hours ago
Hi Christian,

On 19/1/26 08:46, Christian Speich wrote:
> ping?
> 
> I'll rebase it soon as it won't apply cleanly anymore, but I'd like to know if this
> patch is generally going in an right direction?

Sorry for the delay. I'm happy with your series. The only issue I
have is patch #1 is too big, making it hard to review withing missing
something. If you can split it, better, otherwise just send rebased
v3 and I'll try to split myself during review, and post as v4 for
you do double check before merging.

Thanks for this speedup improvement!

Phil.

> 
> Greetings,
> Christian