[v1] aspeed queue

[PULL 0/3] aspeed queue

Cédric Le Goater posted 3 patches 2 months, 2 weeks ago

Diff against v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v1 v2 v2 v2 v2
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Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20251124070524.240618-1-clg@redhat.com

Maintainers: "Cédric Le Goater" <clg@kaod.org>, Peter Maydell <peter.maydell@linaro.org>, Steven Lee <steven_lee@aspeedtech.com>, Troy Lee <leetroy@gmail.com>, Jamin Lin <jamin_lin@aspeedtech.com>, Andrew Jeffery <andrew@codeconstruct.com.au>, Joel Stanley <joel@jms.id.au>

There is a newer version of this series

hw/arm/aspeed_ast10x0.c   |  2 ++
hw/arm/aspeed_ast2600.c   |  2 ++
hw/arm/aspeed_ast27x0.c   |  4 +++-
hw/pci-host/aspeed_pcie.c | 40 +++++++++++++++++++++++++++++++++++++++-
4 files changed, 46 insertions(+), 2 deletions(-)

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[PULL 0/3] aspeed queue

Posted by Cédric Le Goater 2 months, 2 weeks ago

The following changes since commit fb241d0a1fd36a1b67ecced29d8b533316cf9e2d:

  Merge tag 'staging-pull-request' of https://gitlab.com/peterx/qemu into staging (2025-11-23 11:46:53 -0800)

are available in the Git repository at:

  https://github.com/legoater/qemu/ tags/pull-aspeed-20251124

for you to fetch changes up to e9a8b04dbb98fba7942b23b3ac5c35f2f0b9c4a0:

  hw/pci-host/aspeed_pcie: Update ASPEED PCIe Root Port capabilities and enable MSI to support hotplug (2025-11-24 07:52:42 +0100)

----------------------------------------------------------------
aspeed queue:

* Fixed typo in the AST2700 LTPI device
* Fixed missing wiring of the SPI IRQ in AST10x0, AST2600, AST2700 SoCs
* Updated ASPEED PCIe Root Port capabilities and MSI support

----------------------------------------------------------------
Jamin Lin (2):
      hw/arm/aspeed: Fix missing SPI IRQ connection causing DMA interrupt failure
      hw/pci-host/aspeed_pcie: Update ASPEED PCIe Root Port capabilities and enable MSI to support hotplug

Nabih Estefan (1):
      hw/arm/ast27x0: Fix typo in LTPI address

 hw/arm/aspeed_ast10x0.c   |  2 ++
 hw/arm/aspeed_ast2600.c   |  2 ++
 hw/arm/aspeed_ast27x0.c   |  4 +++-
 hw/pci-host/aspeed_pcie.c | 40 +++++++++++++++++++++++++++++++++++++++-
 4 files changed, 46 insertions(+), 2 deletions(-)

Re: [PULL 0/3] aspeed queue

Posted by Michael Tokarev 2 months, 2 weeks ago

On 11/24/25 10:05, Cédric Le Goater wrote:
..
> aspeed queue:
> 
> * Fixed typo in the AST2700 LTPI device
> * Fixed missing wiring of the SPI IRQ in AST10x0, AST2600, AST2700 SoCs
> * Updated ASPEED PCIe Root Port capabilities and MSI support
> 
> ----------------------------------------------------------------
> Jamin Lin (2):
>        hw/arm/aspeed: Fix missing SPI IRQ connection causing DMA interrupt failure
>        hw/pci-host/aspeed_pcie: Update ASPEED PCIe Root Port capabilities and enable MSI to support hotplug
> 
> Nabih Estefan (1):
>        hw/arm/ast27x0: Fix typo in LTPI address

Are the two patches - "Fix typo in LTPI address" and
"Fix missing SPI IRQ connection causing DMA interrupt failure" -
worth picking up to stable (first to 10.1.x, second to 10.0.x
and 10.1.x)?

Will there be migration issues with these in place?

Thanks,

/mjt

Re: [PULL 0/3] aspeed queue

Posted by Cédric Le Goater 2 months, 1 week ago

On 11/24/25 21:36, Michael Tokarev wrote:
> On 11/24/25 10:05, Cédric Le Goater wrote:
> ..
>> aspeed queue:
>>
>> * Fixed typo in the AST2700 LTPI device
>> * Fixed missing wiring of the SPI IRQ in AST10x0, AST2600, AST2700 SoCs
>> * Updated ASPEED PCIe Root Port capabilities and MSI support
>>
>> ----------------------------------------------------------------
>> Jamin Lin (2):
>>        hw/arm/aspeed: Fix missing SPI IRQ connection causing DMA interrupt failure
>>        hw/pci-host/aspeed_pcie: Update ASPEED PCIe Root Port capabilities and enable MSI to support hotplug
>>
>> Nabih Estefan (1):
>>        hw/arm/ast27x0: Fix typo in LTPI address
> 
> Are the two patches - "Fix typo in LTPI address" and
> "Fix missing SPI IRQ connection causing DMA interrupt failure" -
> worth picking up to stable (first to 10.1.x, second to 10.0.x
> and 10.1.x)?

Yes you can take these.

> 
> Will there be migration issues with these in place?

I doubt it.

The Aspeed machines are not versioned and we never claimed to
maintain compatibility. I think there are other issues related
to the secure state of the CPU that prevent migration to work
anyway.

Thanks,

C.

Re: [PULL 0/3] aspeed queue

Posted by Richard Henderson 2 months, 2 weeks ago

On 11/23/25 23:05, Cédric Le Goater wrote:
> The following changes since commit fb241d0a1fd36a1b67ecced29d8b533316cf9e2d:
> 
>    Merge tag 'staging-pull-request' ofhttps://gitlab.com/peterx/qemu into staging (2025-11-23 11:46:53 -0800)
> 
> are available in the Git repository at:
> 
>    https://github.com/legoater/qemu/ tags/pull-aspeed-20251124
> 
> for you to fetch changes up to e9a8b04dbb98fba7942b23b3ac5c35f2f0b9c4a0:
> 
>    hw/pci-host/aspeed_pcie: Update ASPEED PCIe Root Port capabilities and enable MSI to support hotplug (2025-11-24 07:52:42 +0100)
> 
> ----------------------------------------------------------------
> aspeed queue:
> 
> * Fixed typo in the AST2700 LTPI device
> * Fixed missing wiring of the SPI IRQ in AST10x0, AST2600, AST2700 SoCs
> * Updated ASPEED PCIe Root Port capabilities and MSI support


Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/10.2 as appropriate.

r~