[v2] Basic ASID2 Support

[PATCH v2 0/3] Basic ASID2 Support

Jim MacArthur posted 3 patches 2 months, 2 weeks ago

Diff against v3 v4
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git fetch https://github.com/patchew-project/qemu tags/patchew/20251120125833.123813-1-jim.macarthur@linaro.org

Maintainers: Peter Maydell <peter.maydell@linaro.org>

There is a newer version of this series

target/arm/cpu-features.h        |  7 +++++
target/arm/cpu-sysregs.h.inc     |  1 +
target/arm/helper.c              | 10 ++++--
target/arm/tcg/cpu64.c           |  4 +++
tests/tcg/aarch64/system/asid2.c | 53 ++++++++++++++++++++++++++++++++
5 files changed, 73 insertions(+), 2 deletions(-)
create mode 100644 tests/tcg/aarch64/system/asid2.c

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[PATCH v2 0/3] Basic ASID2 Support

Posted by Jim MacArthur 2 months, 2 weeks ago

In V2, I've addressed two comments from Richard Henderson. Thank you for the review.

Changes in v2:
- patch 2:
  - Added FNG1, FNG0, A2 to mask for tcr2_el2_write
- patch 3:
  - Changed test for ASID from "=0x100" to "!= 0"


Jim MacArthur (3):
  target/arm: Enable ID_AA64MMFR4_EL1 register.
  target/arm: Enable ASID2 for cpu_max, allow writes to FNG1, FNG0, A2
  tests: Add test for ASID2 and write/read of feature bits

 target/arm/cpu-features.h        |  7 +++++
 target/arm/cpu-sysregs.h.inc     |  1 +
 target/arm/helper.c              | 10 ++++--
 target/arm/tcg/cpu64.c           |  4 +++
 tests/tcg/aarch64/system/asid2.c | 53 ++++++++++++++++++++++++++++++++
 5 files changed, 73 insertions(+), 2 deletions(-)
 create mode 100644 tests/tcg/aarch64/system/asid2.c

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2.43.0