Hi,
CPUID 0x1D and 0x1E are marked as hardcoded for Sapphire Rapids and
there's the previous attempt [*] to make the fields in 0x1D.0x1 and
0x1E.0x0.EBX user-configurable.
In fact, the "hardcoded" values are defined for architecture, not
the SPR-specific thing, so that it's incorrect and unnecessary to make
them user-configurable.
Therefore, drop the incorrect and misleading comments.
[*]: https://lore.kernel.org/qemu-devel/20230106083826.5384-2-lei4.wang@intel.com/
Thanks and Best Regards,
Zhao
---
Zhao Liu (2):
i386/cpu: Drop incorrect comment for CPUID 0x1D
i386/cpu: Drop incorrect comment for CPUID 0x1E
target/i386/cpu.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
--
2.34.1