[v1] hw/arm/aspeed: Add AST1060 SoC and EVB support

[PATCH v1 03/12] hw/misc/aspeed_scu: Fix the revision ID cannot be set in the SOC layer for AST2600 and AST1030

Posted by Jamin Lin via 1 week, 1 day ago

According to the design of the AST2600, it has a Silicon Revision ID
Register, specifically SCU004 and SCU014, to set the Revision ID for the
AST2600. For the AST2600 A3, SCU004 is set to 0x05030303 and SCU014 is
set to 0x05030303.

In the "aspeed_ast2600_scu_reset" function, the hardcoded value
"AST2600_A3_SILICON_REV" was used for SCU004, while "s->silicon_rev" was
used for SCU014. The value of "s->silicon_rev" is set by the SoC layer
via the "silicon-rev" property. This patch aligns both SCU004 and SCU014
to use "s->silicon_rev" for consistency and flexibility.

Similarly, the "aspeed_ast1030_scu_reset" function also used a fixed
revision constant ("AST1030_A1_SILICON_REV"). This change updates it to
use the same "s->silicon_rev" property, ensuring that both SoCs follow
a consistent and configurable revision handling mechanism.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
 hw/misc/aspeed_scu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
index a0ab5eed8f..1f996d5398 100644
--- a/hw/misc/aspeed_scu.c
+++ b/hw/misc/aspeed_scu.c
@@ -841,7 +841,7 @@ static void aspeed_ast2600_scu_reset(DeviceState *dev)
      * of actual revision. QEMU and Linux only support A1 onwards so this is
      * sufficient.
      */
-    s->regs[AST2600_SILICON_REV] = AST2600_A3_SILICON_REV;
+    s->regs[AST2600_SILICON_REV] = s->silicon_rev;
     s->regs[AST2600_SILICON_REV2] = s->silicon_rev;
     s->regs[AST2600_HW_STRAP1] = s->hw_strap1;
     s->regs[AST2600_HW_STRAP2] = s->hw_strap2;
@@ -1137,7 +1137,7 @@ static void aspeed_ast1030_scu_reset(DeviceState *dev)
 
     memcpy(s->regs, asc->resets, asc->nr_regs * 4);
 
-    s->regs[AST2600_SILICON_REV] = AST1030_A1_SILICON_REV;
+    s->regs[AST2600_SILICON_REV] = s->silicon_rev;
     s->regs[AST2600_SILICON_REV2] = s->silicon_rev;
     s->regs[AST2600_HW_STRAP1] = s->hw_strap1;
     s->regs[AST2600_HW_STRAP2] = s->hw_strap2;
-- 
2.43.0

Re: [PATCH v1 03/12] hw/misc/aspeed_scu: Fix the revision ID cannot be set in the SOC layer for AST2600 and AST1030

Posted by Cédric Le Goater 4 days, 1 hour ago

On 11/6/25 09:49, Jamin Lin wrote:
> According to the design of the AST2600, it has a Silicon Revision ID
> Register, specifically SCU004 and SCU014, to set the Revision ID for the
> AST2600. For the AST2600 A3, SCU004 is set to 0x05030303 and SCU014 is
> set to 0x05030303.
> 
> In the "aspeed_ast2600_scu_reset" function, the hardcoded value
> "AST2600_A3_SILICON_REV" was used for SCU004, while "s->silicon_rev" was
> used for SCU014. The value of "s->silicon_rev" is set by the SoC layer
> via the "silicon-rev" property. This patch aligns both SCU004 and SCU014
> to use "s->silicon_rev" for consistency and flexibility.
> 
> Similarly, the "aspeed_ast1030_scu_reset" function also used a fixed
> revision constant ("AST1030_A1_SILICON_REV"). This change updates it to
> use the same "s->silicon_rev" property, ensuring that both SoCs follow
> a consistent and configurable revision handling mechanism.
> 
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
>   hw/misc/aspeed_scu.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 

Reviewed-by: Cédric Le Goater <clg@redhat.com>

Thanks,

C.