Hi Cédric
> Subject: Re: [PATCH v1 12/12] docs/system/arm/aspeed: Update Aspeed
> MiniBMC section to include AST1060 PFR processor
>
> On 11/6/25 09:49, Jamin Lin wrote:
> > Added details describing AST1060 as a PFR processor board alongside
>
> Please explain what the TLA 'PFR' means.
PFR is the abbreviation for Platform Firmware Resilience, as defined in the NIST SP 800-193
(Platform Firmware Resiliency Guidelines, https://csrc.nist.gov/pubs/sp/800/193/final )
The AST1060 implements the NIST SP 800-193 PFR functionality and effectively serves as the Platform Root of Trust.
So, I will update to use " Platform Root of Trust" instead of PFR.
>
> > AST1030 MiniBMC, and extended the list of missing devices to include
> > SMBus Filter and QSPI Monitor controllers.
> >
> > Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> > ---
> > docs/system/arm/aspeed.rst | 24 +++++++++++++++---------
> > 1 file changed, 15 insertions(+), 9 deletions(-)
> >
> > diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst
> > index a0c05a6f73..ffa5f4b372 100644
> > --- a/docs/system/arm/aspeed.rst
> > +++ b/docs/system/arm/aspeed.rst
> > @@ -448,23 +448,25 @@ Use ``tio`` or another terminal emulator to
> connect to the consoles:
> > $ tio /dev/pts/57
> >
> >
> > -Aspeed minibmc family boards (``ast1030-evb``)
> >
> -===============================================================
> ===
> > +Aspeed minibmc and PFR processor family boards (``ast1030-evb``,
> > +``ast1060-evb``)
> >
> +===============================================================
> ======
> > +============
> >
> > -The QEMU Aspeed machines model mini BMCs of various Aspeed
> evaluation
> > -boards. They are based on different releases of the -Aspeed SoC : the
> > AST1030 integrating an ARM Cortex M4F CPU (200MHz).
> > +The QEMU Aspeed machines model mini BMCs and PFR processors of
> > +various Aspeed evaluation boards. They are based on different
> > +releases of the Aspeed SoC : the AST1030 (MiniBMC) and AST1060 (PFR
> > +Processor), both integrating an ARM Cortex M4F CPU (200MHz).
> >
> > The SoC comes with SRAM, SPI, I2C, etc.
> >
> > -AST1030 SoC based machines :
> > +AST10x0 SoC based machines :
> >
> > -- ``ast1030-evb`` Aspeed AST1030 Evaluation board
> (Cortex-M4F)
> > +- ``ast1030-evb`` Aspeed AST1030 MiniBMC Evaluation board
> (Cortex-M4F)
> > +- ``ast1060-evb`` Aspeed AST1060 PFR Processor Evaluation board
> (Cortex-M4F)
> >
> > Supported devices
> > -----------------
> >
> > - * SMP (for the AST1030 Cortex-M4F)
> > + * SMP (for the Cortex-M4F)
> > * Interrupt Controller (VIC)
> > * Timer Controller
> > * I2C Controller
> > @@ -492,6 +494,8 @@ Missing devices
> > * Virtual UART
> > * eSPI Controller
> > * I3C Controller
> > + * SMBus Filter Controller
> > + * QSPI Monitor Controller
> >
> > Boot options
> > ------------
> > @@ -502,9 +506,11 @@ ASPEED GitHub release repository :
> >
> > https://github.com/AspeedTech-BMC/zephyr/releases
> >
> > + https://github.com/AspeedTech-BMC/aspeed-zephyr-project/releases
> > +
>
> Should we keep a reference to both URLs ?
>
Will remove it.
Thanks-Jamin
> Thanks,
>
> C.
>
>
> > To boot a kernel directly from a Zephyr build tree:
> >
> > .. code-block:: bash
> >
> > $ qemu-system-arm -M ast1030-evb -nographic \
> > - -kernel zephyr.elf
> > + -kernel zephyr.bin