hw/arm/aspeed_ast27x0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
The address for LTPI has one more 0 that it should, bug introduced in
commit 91064bea6b2d747a981cb3bd2904e56f443e6c67.
Signed-off-by: Nabih Estefan <nabihestefan@google.com>
---
hw/arm/aspeed_ast27x0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index c484bcd4e2..1e6f469538 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -87,11 +87,11 @@ static const hwaddr aspeed_soc_ast2700_memmap[] = {
[ASPEED_DEV_UART11] = 0x14C33A00,
[ASPEED_DEV_UART12] = 0x14C33B00,
[ASPEED_DEV_WDT] = 0x14C37000,
+ [ASPEED_DEV_LTPI] = 0x30000000,
[ASPEED_DEV_PCIE_MMIO0] = 0x60000000,
[ASPEED_DEV_PCIE_MMIO1] = 0x80000000,
[ASPEED_DEV_PCIE_MMIO2] = 0xA0000000,
[ASPEED_DEV_SPI_BOOT] = 0x100000000,
- [ASPEED_DEV_LTPI] = 0x300000000,
[ASPEED_DEV_SDRAM] = 0x400000000,
};
--
2.51.2.1006.ga50a493c49-goog
On 11/5/25 00:37, Nabih Estefan wrote:
> The address for LTPI has one more 0 that it should, bug introduced in
> commit 91064bea6b2d747a981cb3bd2904e56f443e6c67.
>
> Signed-off-by: Nabih Estefan <nabihestefan@google.com>
> ---
> hw/arm/aspeed_ast27x0.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Fixes: 91064bea6b2d ("aspeed: ast27x0: Map unimplemented devices in SoC memory")
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Thanks,
C.
> diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
> index c484bcd4e2..1e6f469538 100644
> --- a/hw/arm/aspeed_ast27x0.c
> +++ b/hw/arm/aspeed_ast27x0.c
> @@ -87,11 +87,11 @@ static const hwaddr aspeed_soc_ast2700_memmap[] = {
> [ASPEED_DEV_UART11] = 0x14C33A00,
> [ASPEED_DEV_UART12] = 0x14C33B00,
> [ASPEED_DEV_WDT] = 0x14C37000,
> + [ASPEED_DEV_LTPI] = 0x30000000,
> [ASPEED_DEV_PCIE_MMIO0] = 0x60000000,
> [ASPEED_DEV_PCIE_MMIO1] = 0x80000000,
> [ASPEED_DEV_PCIE_MMIO2] = 0xA0000000,
> [ASPEED_DEV_SPI_BOOT] = 0x100000000,
> - [ASPEED_DEV_LTPI] = 0x300000000,
> [ASPEED_DEV_SDRAM] = 0x400000000,
> };
>
+ Kane
Hi Kane,
Could you please help to review it?
Thanks-Jamin
> Subject: [PATCH] hw/arm/ast27x0: Fix typo in LTPI address
>
> The address for LTPI has one more 0 that it should, bug introduced in commit
> 91064bea6b2d747a981cb3bd2904e56f443e6c67.
>
> Signed-off-by: Nabih Estefan <nabihestefan@google.com>
> ---
> hw/arm/aspeed_ast27x0.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c index
> c484bcd4e2..1e6f469538 100644
> --- a/hw/arm/aspeed_ast27x0.c
> +++ b/hw/arm/aspeed_ast27x0.c
> @@ -87,11 +87,11 @@ static const hwaddr aspeed_soc_ast2700_memmap[]
> = {
> [ASPEED_DEV_UART11] = 0x14C33A00,
> [ASPEED_DEV_UART12] = 0x14C33B00,
> [ASPEED_DEV_WDT] = 0x14C37000,
> + [ASPEED_DEV_LTPI] = 0x30000000,
> [ASPEED_DEV_PCIE_MMIO0] = 0x60000000,
> [ASPEED_DEV_PCIE_MMIO1] = 0x80000000,
> [ASPEED_DEV_PCIE_MMIO2] = 0xA0000000,
> [ASPEED_DEV_SPI_BOOT] = 0x100000000,
> - [ASPEED_DEV_LTPI] = 0x300000000,
> [ASPEED_DEV_SDRAM] = 0x400000000,
> };
>
> --
> 2.51.2.1006.ga50a493c49-goog
Hi Nabih,
I will submit another patch for the LTPI controller soon, and I'll also fix this typo there.
If there are no further concerns, could we leave this change as is?
Best Regards,
Kane
> -----Original Message-----
> From: Jamin Lin <jamin_lin@aspeedtech.com>
> Sent: Wednesday, November 5, 2025 9:11 AM
> To: Nabih Estefan <nabihestefan@google.com>; qemu-devel@nongnu.org;
> Kane Chen <kane_chen@aspeedtech.com>
> Cc: clg@kaod.org; peter.maydell@linaro.org; Steven Lee
> <steven_lee@aspeedtech.com>; leetroy@gmail.com; qemu-arm@nongnu.org
> Subject: RE: [PATCH] hw/arm/ast27x0: Fix typo in LTPI address
>
> + Kane
>
> Hi Kane,
>
> Could you please help to review it?
> Thanks-Jamin
>
> > Subject: [PATCH] hw/arm/ast27x0: Fix typo in LTPI address
> >
> > The address for LTPI has one more 0 that it should, bug introduced in
> > commit 91064bea6b2d747a981cb3bd2904e56f443e6c67.
> >
> > Signed-off-by: Nabih Estefan <nabihestefan@google.com>
> > ---
> > hw/arm/aspeed_ast27x0.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c index
> > c484bcd4e2..1e6f469538 100644
> > --- a/hw/arm/aspeed_ast27x0.c
> > +++ b/hw/arm/aspeed_ast27x0.c
> > @@ -87,11 +87,11 @@ static const hwaddr
> aspeed_soc_ast2700_memmap[] =
> > {
> > [ASPEED_DEV_UART11] = 0x14C33A00,
> > [ASPEED_DEV_UART12] = 0x14C33B00,
> > [ASPEED_DEV_WDT] = 0x14C37000,
> > + [ASPEED_DEV_LTPI] = 0x30000000,
> > [ASPEED_DEV_PCIE_MMIO0] = 0x60000000,
> > [ASPEED_DEV_PCIE_MMIO1] = 0x80000000,
> > [ASPEED_DEV_PCIE_MMIO2] = 0xA0000000,
> > [ASPEED_DEV_SPI_BOOT] = 0x100000000,
> > - [ASPEED_DEV_LTPI] = 0x300000000,
> > [ASPEED_DEV_SDRAM] = 0x400000000,
> > };
> >
> > --
> > 2.51.2.1006.ga50a493c49-goog
Given that 10.2 is closed for features, but not for bug fixes: should
we try and land this in 10.1, and get the LTPI patches in for 11.0?
Thanks,
Nabih
Nabih Estefan (he/him) | Software Engineer |
nabihestefan@google.com | 857-308-9574
On Tue, Nov 4, 2025 at 5:27 PM Kane Chen <kane_chen@aspeedtech.com> wrote:
>
> Hi Nabih,
>
> I will submit another patch for the LTPI controller soon, and I'll also fix this typo there.
> If there are no further concerns, could we leave this change as is?
>
> Best Regards,
> Kane
> > -----Original Message-----
> > From: Jamin Lin <jamin_lin@aspeedtech.com>
> > Sent: Wednesday, November 5, 2025 9:11 AM
> > To: Nabih Estefan <nabihestefan@google.com>; qemu-devel@nongnu.org;
> > Kane Chen <kane_chen@aspeedtech.com>
> > Cc: clg@kaod.org; peter.maydell@linaro.org; Steven Lee
> > <steven_lee@aspeedtech.com>; leetroy@gmail.com; qemu-arm@nongnu.org
> > Subject: RE: [PATCH] hw/arm/ast27x0: Fix typo in LTPI address
> >
> > + Kane
> >
> > Hi Kane,
> >
> > Could you please help to review it?
> > Thanks-Jamin
> >
> > > Subject: [PATCH] hw/arm/ast27x0: Fix typo in LTPI address
> > >
> > > The address for LTPI has one more 0 that it should, bug introduced in
> > > commit 91064bea6b2d747a981cb3bd2904e56f443e6c67.
> > >
> > > Signed-off-by: Nabih Estefan <nabihestefan@google.com>
> > > ---
> > > hw/arm/aspeed_ast27x0.c | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c index
> > > c484bcd4e2..1e6f469538 100644
> > > --- a/hw/arm/aspeed_ast27x0.c
> > > +++ b/hw/arm/aspeed_ast27x0.c
> > > @@ -87,11 +87,11 @@ static const hwaddr
> > aspeed_soc_ast2700_memmap[] =
> > > {
> > > [ASPEED_DEV_UART11] = 0x14C33A00,
> > > [ASPEED_DEV_UART12] = 0x14C33B00,
> > > [ASPEED_DEV_WDT] = 0x14C37000,
> > > + [ASPEED_DEV_LTPI] = 0x30000000,
> > > [ASPEED_DEV_PCIE_MMIO0] = 0x60000000,
> > > [ASPEED_DEV_PCIE_MMIO1] = 0x80000000,
> > > [ASPEED_DEV_PCIE_MMIO2] = 0xA0000000,
> > > [ASPEED_DEV_SPI_BOOT] = 0x100000000,
> > > - [ASPEED_DEV_LTPI] = 0x300000000,
> > > [ASPEED_DEV_SDRAM] = 0x400000000,
> > > };
> > >
> > > --
> > > 2.51.2.1006.ga50a493c49-goog
>
Hello, On 11/7/25 19:28, Nabih Estefan wrote: > Given that 10.2 is closed for features, We are in the soft freeze period : https://wiki.qemu.org/Planning/10.2 Features are still possible if reviewed. None on the Aspeed side. > but not for bug fixes: should we try and land this in 10.1, Yes. That would be the plan. There are a few other patches Jamin sent that could be candidates too. https://lore.kernel.org/qemu-devel/20251106084925.1253704-1-jamin_lin@aspeedtech.com/ > and get the LTPI patches in for 11.0? LTPI and AST1060 SoC and EVB support are for QEMU 11.0 Thanks, C.
On Sat, 8 Nov 2025 at 07:36, Cédric Le Goater <clg@kaod.org> wrote: > > Hello, > > On 11/7/25 19:28, Nabih Estefan wrote: > > Given that 10.2 is closed for features, > > We are in the soft freeze period : > > https://wiki.qemu.org/Planning/10.2 > > Features are still possible if reviewed. Softfreeze means "no new features". The exception is that if you got your feature into a pull request on the list by the softfreeze date then it's still OK to go in even if the pullreq didn't get applied before softfreeze or it needed a v2 to fix some minor issue. thanks -- PMM
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