[PATCH v5 16/25] target/riscv: Fix size of irq_overflow_left

Anton Johansson via posted 25 patches 1 week, 4 days ago
[PATCH v5 16/25] target/riscv: Fix size of irq_overflow_left
Posted by Anton Johansson via 1 week, 4 days ago
Fix to 64 bits to hold all relevant values.

Signed-off-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
---
 target/riscv/cpu.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index d6ad0e1896..604a356292 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -224,7 +224,7 @@ typedef struct PMUCTRState {
     /* Snapshot value of a counter */
     uint64_t mhpmcounter_prev;
     /* Value beyond UINT32_MAX/UINT64_MAX before overflow interrupt trigger */
-    target_ulong irq_overflow_left;
+    uint64_t irq_overflow_left;
 } PMUCTRState;
 
 typedef struct PMUFixedCtrState {
-- 
2.51.0