[v2] target/loongarch: PMU enhancement in KVM mode

[PATCH v2 0/3] target/loongarch: PMU enhancement in KVM mode

Bibo Mao posted 3 patches 2 weeks, 1 day ago

Diff against v1
Download series mbox

Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20251030081724.3921563-1-maobibo@loongson.cn

Maintainers: Song Gao <gaosong@loongson.cn>

target/loongarch/cpu-csr.h |  4 +++
target/loongarch/cpu.c     | 11 +++++---
target/loongarch/cpu.h     |  4 +++
target/loongarch/csr.c     | 32 ++++++++++++++++++++++
target/loongarch/kvm/kvm.c | 54 +++++++++++++++++++++++++++++++++++++-
target/loongarch/machine.c | 21 +++++++++++++++
6 files changed, 122 insertions(+), 4 deletions(-)

Expand all Fold all

[PATCH v2 0/3] target/loongarch: PMU enhancement in KVM mode

Posted by Bibo Mao 2 weeks, 1 day ago

This patchset add PMU migration support and CSR register dump support
with debug purpose, also it removes TLB migration support in TCG mode.

---
v1 ... v2:
  1. Move calling with function loongarch_la464_init_csr() after CPU is
     realized, since PMU feature is decided during realization stage.
  2. Split origin patch #2 for better review
  3. Add PMU event number info in structure CPUArchState rather than
     fixed number 4, save and restore PMU registers by its event number.
---
Bibo Mao (3):
  target/loongarch: Add PMU migration support in KVM mode
  target/loongarch: Call function loongarch_la464_init_csr() after
    realized
  target/loongarch: Add PMU register dump support in KVM

 target/loongarch/cpu-csr.h |  4 +++
 target/loongarch/cpu.c     | 11 +++++---
 target/loongarch/cpu.h     |  4 +++
 target/loongarch/csr.c     | 32 ++++++++++++++++++++++
 target/loongarch/kvm/kvm.c | 54 +++++++++++++++++++++++++++++++++++++-
 target/loongarch/machine.c | 21 +++++++++++++++
 6 files changed, 122 insertions(+), 4 deletions(-)


base-commit: 36076d24f04ea9dc3357c0fbe7bb14917375819c
-- 
2.39.3