This patch set belongs to a list of series that add SVM support for VT-d.
Previous series introduced the support of the ATS and PRI PCIe capabilities.
Here, we focus on exposing SVM to Qemu callers through a device
property.

This work is based on the VT-d specification version 4.1 (March 2023).

What are ATS, PRI and SVM?
''''''''''''''''''''''''''

ATS (Address Translation Service) is a PCIe-level protocol that
enables PCIe devices to query an IOMMU for virtual to physical
address translations in a specific address space (potentially identified by
a PASID). When a device receives a translation response from an IOMMU, it
may decide to store it in an internal cache, often known as "ATC"
(Address Translation Cache) or "Device IOTLB". When triggering a memory
operation using a physical address obtained via ATS, the device must set
the AT field of the PCIe message to "translated" to prevent the IOMMU
from translating the address again. To keep page tables and caches
consistent, the host system can ask the IOMMU to send invalidation requests
to the devices.
PRI (Page Request Interface) is a PCIe-level protocol that enables PCIe devices
to request page fault resolutions to the kernel through an IOMMU. PRI combined
with ATS are the 2 cornerstones of a technology called SVM (Shared Virtual
Memory) or SVA (Shared Virtual Addressing) which allows PCIe devices to read
from and write to the memory of userspace applications without requiring page
pinning.

Resources
'''''''''

Here is a link to our GitHub repository where you can find:
    - Qemu with all the patches for SVM
        - ATS
        - PRI
        - Device IOTLB invalidations
        - Requests with already pre-translated addresses
    - A demo device
    - A simple driver for the demo device
    - A userspace program (for testing and demonstration purposes)

https://github.com/BullSequana/Qemu-in-guest-SVM-demo

Clément Mathieu--Drif (7):
  intel_iommu: Add an IOMMU index for pre-translated addresses
  intel_iommu: Support memory operations with pre-translated addresses
  pcie: Add a function to check if pasid privileged mode is enabled
  pci: Block ATS requests when privileged mode is disabled
  intel_iommu: Handle insufficient permissions during translation
    requests
  intel_iommu: Minimal handling of privileged ATS request
  intel_iommu: Add a CLI option to enable SVM

 hw/i386/intel_iommu.c          | 204 ++++++++++++++++++++++++---------
 hw/i386/intel_iommu_internal.h |  14 ++-
 hw/pci/pci.c                   |   4 +
 hw/pci/pcie.c                  |  21 +++-
 include/hw/i386/intel_iommu.h  |   1 +
 include/hw/pci/pcie.h          |   1 +
 6 files changed, 183 insertions(+), 62 deletions(-)

-- 
2.51.0