[PATCH v2 1/4] target/i386: Add an option in X86CPUDefinition to control CPUID 0x1f

Ewan Hai posted 4 patches 3 months, 2 weeks ago
Maintainers: Paolo Bonzini <pbonzini@redhat.com>, Zhao Liu <zhao1.liu@intel.com>
[PATCH v2 1/4] target/i386: Add an option in X86CPUDefinition to control CPUID 0x1f
Posted by Ewan Hai 3 months, 2 weeks ago
From: Zhao Liu <zhao1.liu@intel.com>

Many Intel and Zhaoxin CPUs enable CPUID 0x1f by default to encode CPU
topology information.

Add the "cpuid_0x1f" option to X86CPUDefinition to allow named CPU
models to configure CPUID 0x1f from the start, thereby forcing 0x1f
to be present for guest.

With this option, there's no need to explicitly add v1 model to an
unversioned CPU model for explicitly enabling the x-force-cpuid-0x1f
property.

Tested-by: Xudong Hao <xudong.hao@intel.com>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
---
 target/i386/cpu.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 0a66e1fec9..c5853216dc 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -2212,6 +2212,12 @@ typedef struct X86CPUDefinition {
     int model;
     int stepping;
     uint8_t avx10_version;
+    /*
+     * Whether to present CPUID 0x1f by default.
+     * If true, encode CPU topology in 0x1f leaf even if there's no
+     * extended topology levels.
+     */
+    bool cpuid_0x1f;
     FeatureWordArray features;
     const char *model_id;
     const CPUCaches *const cache_info;
@@ -7759,6 +7765,10 @@ static void x86_cpu_load_model(X86CPU *cpu, const X86CPUModel *model)
     object_property_set_uint(OBJECT(cpu), "avx10-version", def->avx10_version,
                              &error_abort);
 
+    if (def->cpuid_0x1f) {
+        object_property_set_bool(OBJECT(cpu), "x-force-cpuid-0x1f",
+                                 def->cpuid_0x1f, &error_abort);
+    }
     x86_cpu_apply_version_props(cpu, model);
 
     /*
-- 
2.34.1
Re: [PATCH v2 1/4] target/i386: Add an option in X86CPUDefinition to control CPUID 0x1f
Posted by Zhao Liu 2 months, 2 weeks ago
On Mon, Oct 27, 2025 at 06:21:36AM -0400, Ewan Hai wrote:
> Date: Mon, 27 Oct 2025 06:21:36 -0400
> From: Ewan Hai <ewanhai-oc@zhaoxin.com>
> Subject: [PATCH v2 1/4] target/i386: Add an option in X86CPUDefinition to
>  control CPUID 0x1f
> X-Mailer: git-send-email 2.34.1
> 
> From: Zhao Liu <zhao1.liu@intel.com>
> 
> Many Intel and Zhaoxin CPUs enable CPUID 0x1f by default to encode CPU
> topology information.
> 
> Add the "cpuid_0x1f" option to X86CPUDefinition to allow named CPU
> models to configure CPUID 0x1f from the start, thereby forcing 0x1f
> to be present for guest.
> 
> With this option, there's no need to explicitly add v1 model to an
> unversioned CPU model for explicitly enabling the x-force-cpuid-0x1f
> property.
> 
> Tested-by: Xudong Hao <xudong.hao@intel.com>
> Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
> ---
>  target/i386/cpu.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)

Thanks! I also mentioned this in my series:

https://lore.kernel.org/qemu-devel/20251120071030.961230-8-zhao1.liu@intel.com/

Regards,
Zhao