On 10/24/2025 2:56 PM, Zhao Liu wrote:
> With feature array in ExtSaveArea, add avx10 as the second dependency
> for Opmask/ZMM_Hi256/Hi16_ZMM xsave components, and drop the special
> check in cpuid_has_xsave_feature().
>
> Tested-by: Farrah Chen <farrah.chen@intel.com>
> Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
> ---
> target/i386/cpu.c | 9 +++------
> 1 file changed, 3 insertions(+), 6 deletions(-)
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index cd269d15ce0b..236a2f3a9426 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -2054,18 +2054,21 @@ ExtSaveArea x86_ext_save_areas[XSAVE_STATE_AREA_COUNT] = {
> .size = sizeof(XSaveOpmask),
> .features = {
> { FEAT_7_0_EBX, CPUID_7_0_EBX_AVX512F },
> + { FEAT_7_1_EDX, CPUID_7_1_EDX_AVX10 },
> },
> },
> [XSTATE_ZMM_Hi256_BIT] = {
> .size = sizeof(XSaveZMM_Hi256),
> .features = {
> { FEAT_7_0_EBX, CPUID_7_0_EBX_AVX512F },
> + { FEAT_7_1_EDX, CPUID_7_1_EDX_AVX10 },
> },
> },
> [XSTATE_Hi16_ZMM_BIT] = {
> .size = sizeof(XSaveHi16_ZMM),
> .features = {
> { FEAT_7_0_EBX, CPUID_7_0_EBX_AVX512F },
> + { FEAT_7_1_EDX, CPUID_7_1_EDX_AVX10 },
> },
> },
> [XSTATE_PKRU_BIT] = {
> @@ -8643,12 +8646,6 @@ static bool cpuid_has_xsave_feature(CPUX86State *env, const ExtSaveArea *esa)
> }
> }
>
> - if (esa->features[0].index == FEAT_7_0_EBX &&
> - esa->features[0].mask == CPUID_7_0_EBX_AVX512F &&
> - (env->features[FEAT_7_1_EDX] & CPUID_7_1_EDX_AVX10)) {
> - return true;
> - }
> -
> return false;
> }
>