On 10/24/2025 2:56 PM, Zhao Liu wrote:
<empty commit message> isn't good.
> Tested-by: Farrah Chen <farrah.chen@intel.com>
> Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
> ---
> target/i386/cpu.c | 58 +++++++++++++++++++++++++++--------------------
> 1 file changed, 33 insertions(+), 25 deletions(-)
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 0a66e1fec939..f0e179c2d235 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -2028,38 +2028,46 @@ ExtSaveArea x86_ext_save_areas[XSAVE_STATE_AREA_COUNT] = {
> .feature = FEAT_1_ECX, .bits = CPUID_EXT_XSAVE,
> .size = sizeof(X86LegacyXSaveArea) + sizeof(X86XSaveHeader),
> },
> - [XSTATE_YMM_BIT] =
> - { .feature = FEAT_1_ECX, .bits = CPUID_EXT_AVX,
> - .size = sizeof(XSaveAVX) },
> - [XSTATE_BNDREGS_BIT] =
> - { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX,
> - .size = sizeof(XSaveBNDREG) },
> - [XSTATE_BNDCSR_BIT] =
> - { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX,
> - .size = sizeof(XSaveBNDCSR) },
> - [XSTATE_OPMASK_BIT] =
> - { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_AVX512F,
> - .size = sizeof(XSaveOpmask) },
> - [XSTATE_ZMM_Hi256_BIT] =
> - { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_AVX512F,
> - .size = sizeof(XSaveZMM_Hi256) },
> - [XSTATE_Hi16_ZMM_BIT] =
> - { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_AVX512F,
> - .size = sizeof(XSaveHi16_ZMM) },
> - [XSTATE_PKRU_BIT] =
> - { .feature = FEAT_7_0_ECX, .bits = CPUID_7_0_ECX_PKU,
> - .size = sizeof(XSavePKRU) },
> + [XSTATE_YMM_BIT] = {
> + .feature = FEAT_1_ECX, .bits = CPUID_EXT_AVX,
> + .size = sizeof(XSaveAVX),
> + },
> + [XSTATE_BNDREGS_BIT] = {
> + .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX,
> + .size = sizeof(XSaveBNDREG),
> + },
> + [XSTATE_BNDCSR_BIT] = {
> + .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX,
> + .size = sizeof(XSaveBNDCSR),
> + },
> + [XSTATE_OPMASK_BIT] = {
> + .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_AVX512F,
> + .size = sizeof(XSaveOpmask),
> + },
> + [XSTATE_ZMM_Hi256_BIT] = {
> + .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_AVX512F,
> + .size = sizeof(XSaveZMM_Hi256),
> + },
> + [XSTATE_Hi16_ZMM_BIT] = {
> + .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_AVX512F,
> + .size = sizeof(XSaveHi16_ZMM),
> + },
> + [XSTATE_PKRU_BIT] = {
> + .feature = FEAT_7_0_ECX, .bits = CPUID_7_0_ECX_PKU,
> + .size = sizeof(XSavePKRU),
> + },
> [XSTATE_ARCH_LBR_BIT] = {
> - .feature = FEAT_7_0_EDX, .bits = CPUID_7_0_EDX_ARCH_LBR,
> - .offset = 0 /*supervisor mode component, offset = 0 */,
> - .size = sizeof(XSavesArchLBR) },
> + .feature = FEAT_7_0_EDX, .bits = CPUID_7_0_EDX_ARCH_LBR,
> + .offset = 0 /*supervisor mode component, offset = 0 */,
> + .size = sizeof(XSavesArchLBR),
> + },
> [XSTATE_XTILE_CFG_BIT] = {
> .feature = FEAT_7_0_EDX, .bits = CPUID_7_0_EDX_AMX_TILE,
> .size = sizeof(XSaveXTILECFG),
> },
> [XSTATE_XTILE_DATA_BIT] = {
> .feature = FEAT_7_0_EDX, .bits = CPUID_7_0_EDX_AMX_TILE,
> - .size = sizeof(XSaveXTILEDATA)
> + .size = sizeof(XSaveXTILEDATA),
> },
> };
>