Add new versioned CPU models for Sapphire Rapids, Sierra Forest, Granite
Rapids and Clearwater Forest, to enable shadow stack and indirect branch
tracking.
Tested-by: Farrah Chen <farrah.chen@intel.com>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
---
target/i386/cpu.c | 44 ++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 9a1001c47891..73026d5bce91 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -5161,6 +5161,17 @@ static const X86CPUDefinition builtin_x86_defs[] = {
{ /* end of list */ },
}
},
+ {
+ .version = 5,
+ .note = "with cet-ss and cet-ibt",
+ .props = (PropValue[]) {
+ { "cet-ss", "on" },
+ { "cet-ibt", "on" },
+ { "vmx-exit-save-cet", "on" },
+ { "vmx-entry-load-cet", "on" },
+ { /* end of list */ },
+ }
+ },
{ /* end of list */ }
}
},
@@ -5323,6 +5334,17 @@ static const X86CPUDefinition builtin_x86_defs[] = {
{ /* end of list */ },
}
},
+ {
+ .version = 4,
+ .note = "with cet-ss and cet-ibt",
+ .props = (PropValue[]) {
+ { "cet-ss", "on" },
+ { "cet-ibt", "on" },
+ { "vmx-exit-save-cet", "on" },
+ { "vmx-entry-load-cet", "on" },
+ { /* end of list */ },
+ }
+ },
{ /* end of list */ },
},
},
@@ -5477,6 +5499,17 @@ static const X86CPUDefinition builtin_x86_defs[] = {
{ /* end of list */ },
}
},
+ {
+ .version = 4,
+ .note = "with cet-ss and cet-ibt",
+ .props = (PropValue[]) {
+ { "cet-ss", "on" },
+ { "cet-ibt", "on" },
+ { "vmx-exit-save-cet", "on" },
+ { "vmx-entry-load-cet", "on" },
+ { /* end of list */ },
+ }
+ },
{ /* end of list */ },
},
},
@@ -5612,6 +5645,17 @@ static const X86CPUDefinition builtin_x86_defs[] = {
.model_id = "Intel Xeon Processor (ClearwaterForest)",
.versions = (X86CPUVersionDefinition[]) {
{ .version = 1 },
+ {
+ .version = 2,
+ .note = "with cet-ss and cet-ibt",
+ .props = (PropValue[]) {
+ { "cet-ss", "on" },
+ { "cet-ibt", "on" },
+ { "vmx-exit-save-cet", "on" },
+ { "vmx-entry-load-cet", "on" },
+ { /* end of list */ },
+ }
+ },
{ /* end of list */ },
},
},
--
2.34.1