[PATCH v3 26/34] target/riscv: Indent PMUFixedCtrState correctly

Anton Johansson via posted 34 patches 3 months, 4 weeks ago
Maintainers: Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <dbarboza@ventanamicro.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>, Laurent Vivier <laurent@vivier.eu>, Christoph Muellner <christoph.muellner@vrull.eu>
There is a newer version of this series
[PATCH v3 26/34] target/riscv: Indent PMUFixedCtrState correctly
Posted by Anton Johansson via 3 months, 4 weeks ago
Signed-off-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/riscv/cpu.h | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index cb99314679..3072ee0005 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -227,12 +227,12 @@ typedef struct PMUCTRState {
 } PMUCTRState;
 
 typedef struct PMUFixedCtrState {
-        /* Track cycle and icount for each privilege mode */
-        uint64_t counter[4];
-        uint64_t counter_prev[4];
-        /* Track cycle and icount for each privilege mode when V = 1*/
-        uint64_t counter_virt[2];
-        uint64_t counter_virt_prev[2];
+    /* Track cycle and icount for each privilege mode */
+    uint64_t counter[4];
+    uint64_t counter_prev[4];
+    /* Track cycle and icount for each privilege mode when V = 1*/
+    uint64_t counter_virt[2];
+    uint64_t counter_virt_prev[2];
 } PMUFixedCtrState;
 
 struct CPUArchState {
-- 
2.51.0


Re: [PATCH v3 26/34] target/riscv: Indent PMUFixedCtrState correctly
Posted by Alistair Francis 3 months, 3 weeks ago
On Wed, Oct 15, 2025 at 6:38 AM Anton Johansson via
<qemu-devel@nongnu.org> wrote:
>
> Signed-off-by: Anton Johansson <anjo@rev.ng>
> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/cpu.h | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index cb99314679..3072ee0005 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -227,12 +227,12 @@ typedef struct PMUCTRState {
>  } PMUCTRState;
>
>  typedef struct PMUFixedCtrState {
> -        /* Track cycle and icount for each privilege mode */
> -        uint64_t counter[4];
> -        uint64_t counter_prev[4];
> -        /* Track cycle and icount for each privilege mode when V = 1*/
> -        uint64_t counter_virt[2];
> -        uint64_t counter_virt_prev[2];
> +    /* Track cycle and icount for each privilege mode */
> +    uint64_t counter[4];
> +    uint64_t counter_prev[4];
> +    /* Track cycle and icount for each privilege mode when V = 1*/
> +    uint64_t counter_virt[2];
> +    uint64_t counter_virt_prev[2];
>  } PMUFixedCtrState;
>
>  struct CPUArchState {
> --
> 2.51.0
>
>