This feature adds new registers so that we can support 16 attribute
indirection indexes.  It is a pre-requisite for FEAT_D128.

Changes for v2:
  - Update arm_emulate_firmware_reset.

r~

Richard Henderson (7):
  target/arm: Add isar feature test for FEAT_AIE
  target/arm: Implement MAIR2_ELx and AMAIR2_ELx
  target/arm: Add AIE to ARMVAParameters
  target/arm: Drop trivial assert vs attrindx
  target/arm: Use el local indexing mair_el
  target/arm: Honor param.aie in get_phys_addr_lpae
  target/arm: Enable FEAT_AIE for -cpu max

 target/arm/cpregs.h           |  2 +
 target/arm/cpu-features.h     |  5 ++
 target/arm/cpu.h              |  5 +-
 target/arm/internals.h        |  1 +
 target/arm/cpu.c              |  3 ++
 target/arm/helper.c           | 92 +++++++++++++++++++++++++++++++----
 target/arm/ptw.c              |  5 +-
 target/arm/tcg/cpu64.c        |  1 +
 docs/system/arm/emulation.rst |  1 +
 9 files changed, 103 insertions(+), 12 deletions(-)

-- 
2.43.0

On Tue, 14 Oct 2025 at 20:51, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> This feature adds new registers so that we can support 16 attribute
> indirection indexes.  It is a pre-requisite for FEAT_D128.
>
> Changes for v2:
>   - Update arm_emulate_firmware_reset.
>
> r~
>
> Richard Henderson (7):
>   target/arm: Add isar feature test for FEAT_AIE
>   target/arm: Implement MAIR2_ELx and AMAIR2_ELx
>   target/arm: Add AIE to ARMVAParameters
>   target/arm: Drop trivial assert vs attrindx
>   target/arm: Use el local indexing mair_el
>   target/arm: Honor param.aie in get_phys_addr_lpae
>   target/arm: Enable FEAT_AIE for -cpu max
>



Applied to target-arm.next, thanks.

-- PMM