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[PULL 00/76] target-arm queue

Peter Maydell posted 76 patches 1 month ago
Failed in applying to current master (apply log)
Maintainers: Richard Henderson <richard.henderson@linaro.org>, Paolo Bonzini <pbonzini@redhat.com>, Eduardo Habkost <eduardo@habkost.net>, Marcel Apfelbaum <marcel.apfelbaum@gmail.com>, "Philippe Mathieu-Daudé" <philmd@linaro.org>, Yanan Wang <wangyanan55@huawei.com>, Zhao Liu <zhao1.liu@intel.com>, Laurent Vivier <laurent@vivier.eu>, Peter Maydell <peter.maydell@linaro.org>, Alex Williamson <alex.williamson@redhat.com>, "Cédric Le Goater" <clg@redhat.com>, Radoslaw Biernacki <rad@semihalf.com>, Leif Lindholm <leif.lindholm@oss.qualcomm.com>
There is a newer version of this series
docs/system/arm/emulation.rst                      |   7 +
include/exec/memopidx.h                            |   9 +-
include/hw/core/cpu.h                              |   7 +-
linux-user/aarch64/gcs-internal.h                  |  38 ++
linux-user/aarch64/target_prctl.h                  |  96 +++++
linux-user/aarch64/target_signal.h                 |   1 +
linux-user/qemu.h                                  |   5 +
target/arm/cpregs.h                                |  42 +-
target/arm/cpu-features.h                          |  20 +
target/arm/cpu.h                                   | 253 ++----------
target/arm/internals.h                             | 151 ++-----
target/arm/mmuidx-internal.h                       | 113 ++++++
target/arm/mmuidx.h                                | 241 ++++++++++++
target/arm/syndrome.h                              |  35 ++
target/arm/tcg/helper-a64.h                        |   5 +-
target/arm/tcg/translate.h                         |  46 ++-
tests/tcg/aarch64/gcs.h                            |  80 ++++
target/arm/tcg/a64.decode                          |   5 +
accel/tcg/cputlb.c                                 |   3 -
linux-user/aarch64/cpu_loop.c                      |   5 +
linux-user/aarch64/elfload.c                       |   1 +
linux-user/aarch64/signal.c                        | 138 ++++++-
linux-user/syscall.c                               | 114 ++++++
target/arm/cpregs-gcs.c                            | 156 ++++++++
target/arm/cpu.c                                   |  20 +-
target/arm/gdbstub64.c                             |   2 +
target/arm/helper.c                                | 391 +++++++++++++++---
target/arm/machine.c                               | 113 +++++-
target/arm/mmuidx.c                                |  66 ++++
target/arm/ptw.c                                   | 365 +++++++++++++----
target/arm/tcg-stubs.c                             |   2 +-
target/arm/tcg/cpu64.c                             |   4 +
target/arm/tcg/helper-a64.c                        |  35 +-
target/arm/tcg/hflags.c                            |  38 ++
target/arm/tcg/mte_helper.c                        |   2 +-
target/arm/tcg/op_helper.c                         |  11 +-
target/arm/tcg/tlb-insns.c                         |  47 ++-
target/arm/tcg/tlb_helper.c                        |  18 +-
target/arm/tcg/translate-a64.c                     | 438 +++++++++++++++++++--
target/arm/tcg/translate.c                         |  78 +++-
tests/tcg/aarch64/gcspushm.c                       |  71 ++++
tests/tcg/aarch64/gcsss.c                          |  74 ++++
tests/tcg/aarch64/gcsstr.c                         |  48 +++
target/arm/meson.build                             |   9 +-
.../functional/aarch64/test_device_passthrough.py  |   4 +-
tests/functional/aarch64/test_rme_sbsaref.py       |   4 +-
tests/functional/aarch64/test_rme_virt.py          |   4 +-
tests/tcg/aarch64/Makefile.target                  |   5 +
48 files changed, 2810 insertions(+), 610 deletions(-)
create mode 100644 linux-user/aarch64/gcs-internal.h
create mode 100644 target/arm/mmuidx-internal.h
create mode 100644 target/arm/mmuidx.h
create mode 100644 tests/tcg/aarch64/gcs.h
create mode 100644 target/arm/cpregs-gcs.c
create mode 100644 target/arm/mmuidx.c
create mode 100644 tests/tcg/aarch64/gcspushm.c
create mode 100644 tests/tcg/aarch64/gcsss.c
create mode 100644 tests/tcg/aarch64/gcsstr.c
[PULL 00/76] target-arm queue
Posted by Peter Maydell 1 month ago 
Hi; this is another target-arm pullreq. It's a big one but it's
only two series: FEAT_MEC and FEAT_GCS.

thanks
-- PMM

The following changes since commit 94474a7733a57365d5a27efc28c05462e90e8944:

  Merge tag 'pull-loongarch-20251009' of https://github.com/gaosong715/qemu into staging (2025-10-09 07:59:29 -0700)

are available in the Git repository at:

  https://gitlab.com/pm215/qemu.git tags/pull-target-arm-20251010

for you to fetch changes up to 00936783abf77ebb47a78312a2e6500c6a13d938:

  target/arm: Enable FEAT_MEC in -cpu max (2025-10-10 13:22:05 +0100)

----------------------------------------------------------------
target-arm queue:
 * Implement FEAT_GCS
 * Implement FEAT_MEC

----------------------------------------------------------------
Gustavo Romero (3):
      target/arm: Add a cpreg flag to indicate no trap in NV
      target/arm: Implement FEAT_MEC registers
      target/arm: Enable FEAT_MEC in -cpu max

Pierrick Bouvier (1):
      tests/functional: update tests using TF-A/TF-RMM to support FEAT_GCS

Richard Henderson (72):
      target/arm: Add isar feature test for FEAT_S1PIE, FEAT_S2PIE
      target/arm: Enable TCR2_ELx.PIE
      target/arm: Implement PIR_ELx, PIRE0_ELx, S2PIR_EL2 registers
      target/arm: Force HPD for stage2 translations
      target/arm: Cache NV1 early in get_phys_addr_lpae
      target/arm: Populate PIE in aa64_va_parameters
      target/arm: Implement get_S1prot_indirect
      target/arm: Implement get_S2prot_indirect
      target/arm: Expand CPUARMState.exception.syndrome to 64 bits
      target/arm: Expand syndrome parameter to raise_exception*
      target/arm: Implement dirtybit check for PIE
      target/arm: Enable FEAT_S1PIE and FEAT_S2PIE on -cpu max
      include/exec/memopidx: Adjust for 32 mmu indexes
      include/hw/core/cpu: Widen MMUIdxMap
      target/arm: Split out mmuidx.h from cpu.h
      target/arm: Convert arm_mmu_idx_to_el from switch to table
      target/arm: Remove unused env argument from regime_el
      target/arm: Convert regime_el from switch to table
      target/arm: Convert regime_has_2_ranges from switch to table
      target/arm: Remove unused env argument from regime_is_pan
      target/arm: Convert regime_is_pan from switch to table
      target/arm: Remove unused env argument from regime_is_user
      target/arm: Convert regime_is_user from switch to table
      target/arm: Convert arm_mmu_idx_is_stage1_of_2 from switch to table
      target/arm: Convert regime_is_stage2 to table
      target/arm: Introduce mmu indexes for GCS
      target/arm: Introduce regime_to_gcs
      target/arm: Support page protections for GCS mmu indexes
      target/arm: Implement gcs bit for data abort
      target/arm: Add GCS cpregs
      target/arm: Add GCS enable and trap levels to DisasContext
      target/arm: Implement FEAT_CHK
      target/arm: Make helper_exception_return system-only
      target/arm: Export cpsr_{read_for, write_from}_spsr_elx
      target/arm: Expand pstate to 64 bits
      target/arm: Add syndrome data for EC_GCS
      target/arm: Add arm_hcr_el2_nvx_eff
      target/arm: Use arm_hcr_el2_nvx_eff in access_nv1
      target/arm: Split out access_nv1_with_nvx
      target/arm: Implement EXLOCKException for ELR_ELx and SPSR_ELx
      target/arm: Split {full,core}_a64_user_mem_index
      target/arm: Introduce delay_exception{_el}
      target/arm: Emit HSTR trap exception out of line
      target/arm: Emit v7m LTPSIZE exception out of line
      target/arm: Implement GCSSTR, GCSSTTR
      target/arm: Implement GCSB
      target/arm: Implement GCSPUSHM
      target/arm: Implement GCSPOPM
      target/arm: Implement GCSPUSHX
      target/arm: Implement GCSPOPX
      target/arm: Implement GCSPOPCX
      target/arm: Implement GCSSS1
      target/arm: Implement GCSSS2
      target/arm: Add gcs record for BL
      target/arm: Add gcs record for BLR
      target/arm: Add gcs record for BLR with PAuth
      target/arm: Load gcs record for RET
      target/arm: Load gcs record for RET with PAuth
      target/arm: Copy EXLOCKEn to EXLOCK on exception to the same EL
      target/arm: Implement EXLOCK check during exception return
      target/arm: Enable FEAT_GCS with -cpu max
      linux-user/aarch64: Implement prctls for GCS
      linux-user/aarch64: Allocate new gcs stack on clone
      linux-user/aarch64: Release gcs stack on thread exit
      linux-user/aarch64: Implement map_shadow_stack syscall
      target/arm: Enable GCSPR_EL0 for read in user-mode
      linux-user/aarch64: Inject SIGSEGV for GCS faults
      linux-user/aarch64: Generate GCS signal records
      linux-user/aarch64: Enable GCS in HWCAP
      tests/tcg/aarch64: Add gcsstr
      tests/tcg/aarch64: Add gcspushm
      tests/tcg/aarch64: Add gcsss

 docs/system/arm/emulation.rst                      |   7 +
 include/exec/memopidx.h                            |   9 +-
 include/hw/core/cpu.h                              |   7 +-
 linux-user/aarch64/gcs-internal.h                  |  38 ++
 linux-user/aarch64/target_prctl.h                  |  96 +++++
 linux-user/aarch64/target_signal.h                 |   1 +
 linux-user/qemu.h                                  |   5 +
 target/arm/cpregs.h                                |  42 +-
 target/arm/cpu-features.h                          |  20 +
 target/arm/cpu.h                                   | 253 ++----------
 target/arm/internals.h                             | 151 ++-----
 target/arm/mmuidx-internal.h                       | 113 ++++++
 target/arm/mmuidx.h                                | 241 ++++++++++++
 target/arm/syndrome.h                              |  35 ++
 target/arm/tcg/helper-a64.h                        |   5 +-
 target/arm/tcg/translate.h                         |  46 ++-
 tests/tcg/aarch64/gcs.h                            |  80 ++++
 target/arm/tcg/a64.decode                          |   5 +
 accel/tcg/cputlb.c                                 |   3 -
 linux-user/aarch64/cpu_loop.c                      |   5 +
 linux-user/aarch64/elfload.c                       |   1 +
 linux-user/aarch64/signal.c                        | 138 ++++++-
 linux-user/syscall.c                               | 114 ++++++
 target/arm/cpregs-gcs.c                            | 156 ++++++++
 target/arm/cpu.c                                   |  20 +-
 target/arm/gdbstub64.c                             |   2 +
 target/arm/helper.c                                | 391 +++++++++++++++---
 target/arm/machine.c                               | 113 +++++-
 target/arm/mmuidx.c                                |  66 ++++
 target/arm/ptw.c                                   | 365 +++++++++++++----
 target/arm/tcg-stubs.c                             |   2 +-
 target/arm/tcg/cpu64.c                             |   4 +
 target/arm/tcg/helper-a64.c                        |  35 +-
 target/arm/tcg/hflags.c                            |  38 ++
 target/arm/tcg/mte_helper.c                        |   2 +-
 target/arm/tcg/op_helper.c                         |  11 +-
 target/arm/tcg/tlb-insns.c                         |  47 ++-
 target/arm/tcg/tlb_helper.c                        |  18 +-
 target/arm/tcg/translate-a64.c                     | 438 +++++++++++++++++++--
 target/arm/tcg/translate.c                         |  78 +++-
 tests/tcg/aarch64/gcspushm.c                       |  71 ++++
 tests/tcg/aarch64/gcsss.c                          |  74 ++++
 tests/tcg/aarch64/gcsstr.c                         |  48 +++
 target/arm/meson.build                             |   9 +-
 .../functional/aarch64/test_device_passthrough.py  |   4 +-
 tests/functional/aarch64/test_rme_sbsaref.py       |   4 +-
 tests/functional/aarch64/test_rme_virt.py          |   4 +-
 tests/tcg/aarch64/Makefile.target                  |   5 +
 48 files changed, 2810 insertions(+), 610 deletions(-)
 create mode 100644 linux-user/aarch64/gcs-internal.h
 create mode 100644 target/arm/mmuidx-internal.h
 create mode 100644 target/arm/mmuidx.h
 create mode 100644 tests/tcg/aarch64/gcs.h
 create mode 100644 target/arm/cpregs-gcs.c
 create mode 100644 target/arm/mmuidx.c
 create mode 100644 tests/tcg/aarch64/gcspushm.c
 create mode 100644 tests/tcg/aarch64/gcsss.c
 create mode 100644 tests/tcg/aarch64/gcsstr.c
Re: [PULL 00/76] target-arm queue
Posted by Richard Henderson 1 month ago 
On 10/10/25 06:04, Peter Maydell wrote:
> Hi; this is another target-arm pullreq. It's a big one but it's
> only two series: FEAT_MEC and FEAT_GCS.
> 
> thanks
> -- PMM
> 
> The following changes since commit 94474a7733a57365d5a27efc28c05462e90e8944:
> 
>    Merge tag 'pull-loongarch-20251009' ofhttps://github.com/gaosong715/qemu into staging (2025-10-09 07:59:29 -0700)
> 
> are available in the Git repository at:
> 
>    https://gitlab.com/pm215/qemu.git tags/pull-target-arm-20251010
> 
> for you to fetch changes up to 00936783abf77ebb47a78312a2e6500c6a13d938:
> 
>    target/arm: Enable FEAT_MEC in -cpu max (2025-10-10 13:22:05 +0100)
> 
> ----------------------------------------------------------------
> target-arm queue:
>   * Implement FEAT_GCS
>   * Implement FEAT_MEC

Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/10.2 as appropriate.

r~
Re: [PULL 00/76] target-arm queue
Posted by Gustavo Romero 1 month ago 
Hi,

On 10/10/25 16:03, Richard Henderson wrote:
> On 10/10/25 06:04, Peter Maydell wrote:
>> Hi; this is another target-arm pullreq. It's a big one but it's
>> only two series: FEAT_MEC and FEAT_GCS.
>>
>> thanks
>> -- PMM
>>
>> The following changes since commit 94474a7733a57365d5a27efc28c05462e90e8944:
>>
>>    Merge tag 'pull-loongarch-20251009' ofhttps://github.com/gaosong715/qemu into staging (2025-10-09 07:59:29 -0700)
>>
>> are available in the Git repository at:
>>
>>    https://gitlab.com/pm215/qemu.git tags/pull-target-arm-20251010
>>
>> for you to fetch changes up to 00936783abf77ebb47a78312a2e6500c6a13d938:
>>
>>    target/arm: Enable FEAT_MEC in -cpu max (2025-10-10 13:22:05 +0100)
>>
>> ----------------------------------------------------------------
>> target-arm queue:
>>   * Implement FEAT_GCS
>>   * Implement FEAT_MEC
> 
> Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/10.2 as appropriate.

Could somebody give me access to https://wiki.qemu.org/ChangeLog/10.2, please?


Cheers,
Gustavo
Re: [PULL 00/76] target-arm queue
Posted by Peter Maydell 1 month ago 
On Fri, 10 Oct 2025 at 20:59, Gustavo Romero <gustavo.romero@linaro.org> wrote:
>
> Hi,
>
> On 10/10/25 16:03, Richard Henderson wrote:
> > On 10/10/25 06:04, Peter Maydell wrote:
> >> Hi; this is another target-arm pullreq. It's a big one but it's
> >> only two series: FEAT_MEC and FEAT_GCS.
> >>
> >> thanks
> >> -- PMM
> >>
> >> The following changes since commit 94474a7733a57365d5a27efc28c05462e90e8944:
> >>
> >>    Merge tag 'pull-loongarch-20251009' ofhttps://github.com/gaosong715/qemu into staging (2025-10-09 07:59:29 -0700)
> >>
> >> are available in the Git repository at:
> >>
> >>    https://gitlab.com/pm215/qemu.git tags/pull-target-arm-20251010
> >>
> >> for you to fetch changes up to 00936783abf77ebb47a78312a2e6500c6a13d938:
> >>
> >>    target/arm: Enable FEAT_MEC in -cpu max (2025-10-10 13:22:05 +0100)
> >>
> >> ----------------------------------------------------------------
> >> target-arm queue:
> >>   * Implement FEAT_GCS
> >>   * Implement FEAT_MEC
> >
> > Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/10.2 as appropriate.
>
> Could somebody give me access to https://wiki.qemu.org/ChangeLog/10.2, please?

It should be accessible to anybody with a wiki account, I think.

(I have already updated it per this pullreq's changes; let me
know if I missed anything.)

thanks
-- PMM
Re: [PULL 00/76] target-arm queue
Posted by Gustavo Romero 1 month ago 
Hi Peter,

On 10/12/25 16:58, Peter Maydell wrote:
> On Fri, 10 Oct 2025 at 20:59, Gustavo Romero <gustavo.romero@linaro.org> wrote:
>>
>> Hi,
>>
>> On 10/10/25 16:03, Richard Henderson wrote:
>>> On 10/10/25 06:04, Peter Maydell wrote:
>>>> Hi; this is another target-arm pullreq. It's a big one but it's
>>>> only two series: FEAT_MEC and FEAT_GCS.
>>>>
>>>> thanks
>>>> -- PMM
>>>>
>>>> The following changes since commit 94474a7733a57365d5a27efc28c05462e90e8944:
>>>>
>>>>     Merge tag 'pull-loongarch-20251009' ofhttps://github.com/gaosong715/qemu into staging (2025-10-09 07:59:29 -0700)
>>>>
>>>> are available in the Git repository at:
>>>>
>>>>     https://gitlab.com/pm215/qemu.git tags/pull-target-arm-20251010
>>>>
>>>> for you to fetch changes up to 00936783abf77ebb47a78312a2e6500c6a13d938:
>>>>
>>>>     target/arm: Enable FEAT_MEC in -cpu max (2025-10-10 13:22:05 +0100)
>>>>
>>>> ----------------------------------------------------------------
>>>> target-arm queue:
>>>>    * Implement FEAT_GCS
>>>>    * Implement FEAT_MEC
>>>
>>> Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/10.2 as appropriate.
>>
>> Could somebody give me access to https://wiki.qemu.org/ChangeLog/10.2, please?
> 
> It should be accessible to anybody with a wiki account, I think.
> 
> (I have already updated it per this pullreq's changes; let me
> know if I missed anything.)

It's missing FEAT_MEC in the list. But let me add it so I can test my access to the Wiki pages.

Currently, the wiki is returning a Bad Gateway, so I'll wait it get resolved ;)


Cheers,
Gustavo
Re: [PULL 00/76] target-arm queue
Posted by Peter Maydell 1 month ago 
On Tue, 14 Oct 2025 at 16:24, Gustavo Romero <gustavo.romero@linaro.org> wrote:
>
> Hi Peter,
>
> On 10/12/25 16:58, Peter Maydell wrote:
> > On Fri, 10 Oct 2025 at 20:59, Gustavo Romero <gustavo.romero@linaro.org> wrote:
> >>
> >> Hi,
> >>
> >> On 10/10/25 16:03, Richard Henderson wrote:
> >>> On 10/10/25 06:04, Peter Maydell wrote:
> >>>> ----------------------------------------------------------------
> >>>> target-arm queue:
> >>>>    * Implement FEAT_GCS
> >>>>    * Implement FEAT_MEC
> >>>
> >>> Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/10.2 as appropriate.
> >>
> >> Could somebody give me access to https://wiki.qemu.org/ChangeLog/10.2, please?
> >
> > It should be accessible to anybody with a wiki account, I think.
> >
> > (I have already updated it per this pullreq's changes; let me
> > know if I missed anything.)
>
> It's missing FEAT_MEC in the list.

...and also FEAT_GCS : looks like I didn't update the changelog
at all for this pullreq. Either I was confusing it with
some other pullreq, or else I failed to actually save my
changes or something.

> But let me add it so I can test my access to the Wiki pages.

Sure -- please add both FEAT_MEC and FEAT_GCS.

-- PMM
Re: [PULL 00/76] target-arm queue
Posted by Gustavo Romero 1 month ago 
Hi Peter,

On 10/14/25 12:28, Peter Maydell wrote:
> On Tue, 14 Oct 2025 at 16:24, Gustavo Romero <gustavo.romero@linaro.org> wrote:
>>
>> Hi Peter,
>>
>> On 10/12/25 16:58, Peter Maydell wrote:
>>> On Fri, 10 Oct 2025 at 20:59, Gustavo Romero <gustavo.romero@linaro.org> wrote:
>>>>
>>>> Hi,
>>>>
>>>> On 10/10/25 16:03, Richard Henderson wrote:
>>>>> On 10/10/25 06:04, Peter Maydell wrote:
>>>>>> ----------------------------------------------------------------
>>>>>> target-arm queue:
>>>>>>     * Implement FEAT_GCS
>>>>>>     * Implement FEAT_MEC
>>>>>
>>>>> Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/10.2 as appropriate.
>>>>
>>>> Could somebody give me access to https://wiki.qemu.org/ChangeLog/10.2, please?
>>>
>>> It should be accessible to anybody with a wiki account, I think.
>>>
>>> (I have already updated it per this pullreq's changes; let me
>>> know if I missed anything.)
>>
>> It's missing FEAT_MEC in the list.
> 
> ...and also FEAT_GCS : looks like I didn't update the changelog
> at all for this pullreq. Either I was confusing it with
> some other pullreq, or else I failed to actually save my
> changes or something.
> 
>> But let me add it so I can test my access to the Wiki pages.
> 
> Sure -- please add both FEAT_MEC and FEAT_GCS.

Ok! ;)


Cheers,
Gustavo
Re: [PULL 00/76] target-arm queue
Posted by Peter Maydell 3 weeks ago 
On Tue, 14 Oct 2025 at 17:15, Gustavo Romero <gustavo.romero@linaro.org> wrote:
>
> Hi Peter,
>
> On 10/14/25 12:28, Peter Maydell wrote:
> > On Tue, 14 Oct 2025 at 16:24, Gustavo Romero <gustavo.romero@linaro.org> wrote:
> >>
> >> Hi Peter,
> >>
> >> On 10/12/25 16:58, Peter Maydell wrote:
> >> It's missing FEAT_MEC in the list.
> >
> > ...and also FEAT_GCS : looks like I didn't update the changelog
> > at all for this pullreq. Either I was confusing it with
> > some other pullreq, or else I failed to actually save my
> > changes or something.
> >
> >> But let me add it so I can test my access to the Wiki pages.
> >
> > Sure -- please add both FEAT_MEC and FEAT_GCS.
>
> Ok! ;)

I was just updating the changelog again for the pullreq
that just landed, and I noticed it was still missing FEAT_MEC
and FEAT_GCS, so I went ahead and added them since I was editing
that page anyway.

thanks
-- PMM

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