[PATCH 2/8] target/rx: Use MemOp type in gen_ld[u]() and gen_st()

Philippe Mathieu-Daudé posted 8 patches 1 month ago
Maintainers: Yoshinori Sato <yoshinori.sato@nifty.com>
[PATCH 2/8] target/rx: Use MemOp type in gen_ld[u]() and gen_st()
Posted by Philippe Mathieu-Daudé 1 month ago
The @size argument is of MemOp type. All callers respect that.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/rx/translate.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/target/rx/translate.c b/target/rx/translate.c
index c22ca78a055..9a2be2107bd 100644
--- a/target/rx/translate.c
+++ b/target/rx/translate.c
@@ -161,19 +161,19 @@ static void gen_goto_tb(DisasContext *dc, int n, vaddr dest)
 }
 
 /* generic load wrapper */
-static inline void rx_gen_ld(unsigned int size, TCGv reg, TCGv mem)
+static inline void rx_gen_ld(MemOp size, TCGv reg, TCGv mem)
 {
     tcg_gen_qemu_ld_i32(reg, mem, 0, size | MO_SIGN | MO_TE);
 }
 
 /* unsigned load wrapper */
-static inline void rx_gen_ldu(unsigned int size, TCGv reg, TCGv mem)
+static inline void rx_gen_ldu(MemOp size, TCGv reg, TCGv mem)
 {
     tcg_gen_qemu_ld_i32(reg, mem, 0, size | MO_TE);
 }
 
 /* generic store wrapper */
-static inline void rx_gen_st(unsigned int size, TCGv reg, TCGv mem)
+static inline void rx_gen_st(MemOp size, TCGv reg, TCGv mem)
 {
     tcg_gen_qemu_st_i32(reg, mem, 0, size | MO_TE);
 }
-- 
2.51.0


Re: [PATCH 2/8] target/rx: Use MemOp type in gen_ld[u]() and gen_st()
Posted by Richard Henderson 1 month ago
On 10/9/25 08:16, Philippe Mathieu-Daudé wrote:
> The @size argument is of MemOp type. All callers respect that.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   target/rx/translate.c | 6 +++---
>   1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/target/rx/translate.c b/target/rx/translate.c
> index c22ca78a055..9a2be2107bd 100644
> --- a/target/rx/translate.c
> +++ b/target/rx/translate.c
> @@ -161,19 +161,19 @@ static void gen_goto_tb(DisasContext *dc, int n, vaddr dest)
>   }
>   
>   /* generic load wrapper */
> -static inline void rx_gen_ld(unsigned int size, TCGv reg, TCGv mem)
> +static inline void rx_gen_ld(MemOp size, TCGv reg, TCGv mem)
>   {
>       tcg_gen_qemu_ld_i32(reg, mem, 0, size | MO_SIGN | MO_TE);
>   }
>   
>   /* unsigned load wrapper */
> -static inline void rx_gen_ldu(unsigned int size, TCGv reg, TCGv mem)
> +static inline void rx_gen_ldu(MemOp size, TCGv reg, TCGv mem)
>   {
>       tcg_gen_qemu_ld_i32(reg, mem, 0, size | MO_TE);
>   }
>   
>   /* generic store wrapper */
> -static inline void rx_gen_st(unsigned int size, TCGv reg, TCGv mem)
> +static inline void rx_gen_st(MemOp size, TCGv reg, TCGv mem)
>   {
>       tcg_gen_qemu_st_i32(reg, mem, 0, size | MO_TE);
>   }

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~