[PATCH 5/9] target/hppa: Conceal MO_TE within do_load_32/64()

Philippe Mathieu-Daudé posted 9 patches 1 month ago
Maintainers: Richard Henderson <richard.henderson@linaro.org>, Helge Deller <deller@gmx.de>
[PATCH 5/9] target/hppa: Conceal MO_TE within do_load_32/64()
Posted by Philippe Mathieu-Daudé 1 month ago
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/hppa/translate.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index ee0c874342c..4680d826345 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -1599,6 +1599,7 @@ static void do_load_32(DisasContext *ctx, TCGv_i32 dest, unsigned rb,
     /* Caller uses nullify_over/nullify_end.  */
     assert(ctx->null_cond.c == TCG_COND_NEVER);
 
+    mop |= MO_TE;
     form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
              MMU_DISABLED(ctx));
     tcg_gen_qemu_ld_i32(dest, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
@@ -1617,6 +1618,7 @@ static void do_load_64(DisasContext *ctx, TCGv_i64 dest, unsigned rb,
     /* Caller uses nullify_over/nullify_end.  */
     assert(ctx->null_cond.c == TCG_COND_NEVER);
 
+    mop |= MO_TE;
     form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
              MMU_DISABLED(ctx));
     tcg_gen_qemu_ld_i64(dest, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
@@ -1676,7 +1678,7 @@ static bool do_load(DisasContext *ctx, unsigned rt, unsigned rb,
         /* Make sure if RT == RB, we see the result of the load.  */
         dest = tcg_temp_new_i64();
     }
-    do_load_64(ctx, dest, rb, rx, scale, disp, sp, modify, MO_TE | mop);
+    do_load_64(ctx, dest, rb, rx, scale, disp, sp, modify, mop);
     save_gpr(ctx, rt, dest);
 
     return nullify_end(ctx);
@@ -1691,7 +1693,7 @@ static bool do_floadw(DisasContext *ctx, unsigned rt, unsigned rb,
     nullify_over(ctx);
 
     tmp = tcg_temp_new_i32();
-    do_load_32(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TE | MO_UL);
+    do_load_32(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_UL);
     save_frw_i32(rt, tmp);
 
     if (rt == 0) {
@@ -1716,7 +1718,7 @@ static bool do_floadd(DisasContext *ctx, unsigned rt, unsigned rb,
     nullify_over(ctx);
 
     tmp = tcg_temp_new_i64();
-    do_load_64(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TE | MO_UQ);
+    do_load_64(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_UQ);
     save_frd(rt, tmp);
 
     if (rt == 0) {
-- 
2.51.0


Re: [PATCH 5/9] target/hppa: Conceal MO_TE within do_load_32/64()
Posted by Richard Henderson 1 month ago
On 10/9/25 03:10, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   target/hppa/translate.c | 8 +++++---
>   1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/target/hppa/translate.c b/target/hppa/translate.c
> index ee0c874342c..4680d826345 100644
> --- a/target/hppa/translate.c
> +++ b/target/hppa/translate.c
> @@ -1599,6 +1599,7 @@ static void do_load_32(DisasContext *ctx, TCGv_i32 dest, unsigned rb,
>       /* Caller uses nullify_over/nullify_end.  */
>       assert(ctx->null_cond.c == TCG_COND_NEVER);
>   
> +    mop |= MO_TE;
>       form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
>                MMU_DISABLED(ctx));
>       tcg_gen_qemu_ld_i32(dest, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
> @@ -1617,6 +1618,7 @@ static void do_load_64(DisasContext *ctx, TCGv_i64 dest, unsigned rb,
>       /* Caller uses nullify_over/nullify_end.  */
>       assert(ctx->null_cond.c == TCG_COND_NEVER);
>   
> +    mop |= MO_TE;
>       form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
>                MMU_DISABLED(ctx));
>       tcg_gen_qemu_ld_i64(dest, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
> @@ -1676,7 +1678,7 @@ static bool do_load(DisasContext *ctx, unsigned rt, unsigned rb,
>           /* Make sure if RT == RB, we see the result of the load.  */
>           dest = tcg_temp_new_i64();
>       }
> -    do_load_64(ctx, dest, rb, rx, scale, disp, sp, modify, MO_TE | mop);
> +    do_load_64(ctx, dest, rb, rx, scale, disp, sp, modify, mop);
>       save_gpr(ctx, rt, dest);
>   
>       return nullify_end(ctx);
> @@ -1691,7 +1693,7 @@ static bool do_floadw(DisasContext *ctx, unsigned rt, unsigned rb,
>       nullify_over(ctx);
>   
>       tmp = tcg_temp_new_i32();
> -    do_load_32(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TE | MO_UL);
> +    do_load_32(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_UL);
>       save_frw_i32(rt, tmp);
>   
>       if (rt == 0) {
> @@ -1716,7 +1718,7 @@ static bool do_floadd(DisasContext *ctx, unsigned rt, unsigned rb,
>       nullify_over(ctx);
>   
>       tmp = tcg_temp_new_i64();
> -    do_load_64(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TE | MO_UQ);
> +    do_load_64(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_UQ);
>       save_frd(rt, tmp);
>   
>       if (rt == 0) {

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~