[PATCH 03/10] target/arm: Enable FEAT_RME_GPC2 bits in gpccr_write

Richard Henderson posted 10 patches 2 days, 15 hours ago
Maintainers: Peter Maydell <peter.maydell@linaro.org>
[PATCH 03/10] target/arm: Enable FEAT_RME_GPC2 bits in gpccr_write
Posted by Richard Henderson 2 days, 15 hours ago
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/helper.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/target/arm/helper.c b/target/arm/helper.c
index c44294711f..bfc40c505e 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -5109,6 +5109,11 @@ static void gpccr_write(CPUARMState *env, const ARMCPRegInfo *ri,
         R_GPCCR_ORGN_MASK | R_GPCCR_SH_MASK | R_GPCCR_PGS_MASK |
         R_GPCCR_GPC_MASK | R_GPCCR_GPCP_MASK;
 
+    if (cpu_isar_feature(aa64_rme_gpc2, env_archcpu(env))) {
+        rw_mask |= R_GPCCR_APPSAA_MASK | R_GPCCR_NSO_MASK |
+                   R_GPCCR_SPAD_MASK | R_GPCCR_NSPAD_MASK | R_GPCCR_RLPAD_MASK;
+    }
+
     env->cp15.gpccr_el3 = (value & rw_mask) | (env->cp15.gpccr_el3 & ~rw_mask);
 }
 
-- 
2.43.0