v1
 1. Added support for Vboot ROM.
 2. Moved coprocessor initialization from machine level to SoC level
 3. Unified SCU controllers between PSP and coprocessors
 4. Shared the same SRAM between PSP and coprocessors
 5. Support PSP DRAM remaps coprocessor SDRAM
 6. Added support for controlling coprocessor reset via SCU registers.

v2
Split the original patch set into smaller sub-patches for review.
 This patch focuses on:
  1. Adding support for Vboot ROM.
  2. Moving common APIs to SoC-level code for reuse in different
     platforms and reducing duplication.

v3
  1. Drop dead return checks.
  2. Make sub-init functions return bool with errp.

Dependencies

Based on https://github.com/legoater/qemu at the aspeed-next branch.

Jamin Lin (8):
  hw/arm/aspeed: Move aspeed_board_init_flashes() to common SoC code
  hw/arm/aspeed: Move write_boot_rom to common SoC code
  hw/arm/aspeed: Move aspeed_install_boot_rom to common SoC code
  hw/arm/aspeed: Move aspeed_load_vbootrom to common SoC code
  hw/arm/aspeed_ast27x0-fc: Drop dead return checks
  hw/arm/aspeed_ast27x0-fc: Make sub-init functions return bool with
    errp
  hw/arm/aspeed_ast27x0-fc: Map FMC0 flash contents into CA35 boot ROM
  hw/arm/aspeed_ast27x0-fc: Add VBOOTROM support

 include/hw/arm/aspeed_soc.h |   8 +++
 hw/arm/aspeed.c             | 105 ++----------------------------------
 hw/arm/aspeed_ast27x0-fc.c  |  96 +++++++++++++++++----------------
 hw/arm/aspeed_soc_common.c  |  96 +++++++++++++++++++++++++++++++++
 4 files changed, 159 insertions(+), 146 deletions(-)

-- 
2.43.0