From: Xuemei Liu <liu.xuemei1@zte.com.cn>
Similar to other architectures (e.g., x86_64, aarch64), utilizing THP on RISC-V
KVM requires 2MiB-aligned memory blocks.
Signed-off-by: Xuemei Liu <liu.xuemei1@zte.com.cn>
---
include/qemu/osdep.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
index 1b38cb7e45..6de6c0c4e5 100644
--- a/include/qemu/osdep.h
+++ b/include/qemu/osdep.h
@@ -561,7 +561,7 @@ int madvise(char *, size_t, int);
#if defined(__linux__) && \
(defined(__x86_64__) || defined(__arm__) || defined(__aarch64__) \
- || defined(__powerpc64__))
+ || defined(__powerpc64__) || defined(__riscv))
/* Use 2 MiB alignment so transparent hugepages can be used by KVM.
Valgrind does not support alignments larger than 1 MiB,
therefore we need special code which handles running on Valgrind. */
--
2.27.0
On Wed, Sep 24, 2025 at 3:20 PM <liu.xuemei1@zte.com.cn> wrote: > > From: Xuemei Liu <liu.xuemei1@zte.com.cn> > > Similar to other architectures (e.g., x86_64, aarch64), utilizing THP on RISC-V > KVM requires 2MiB-aligned memory blocks. > > Signed-off-by: Xuemei Liu <liu.xuemei1@zte.com.cn> Thanks! Applied to riscv-to-apply.next Alistair > --- > include/qemu/osdep.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h > index 1b38cb7e45..6de6c0c4e5 100644 > --- a/include/qemu/osdep.h > +++ b/include/qemu/osdep.h > @@ -561,7 +561,7 @@ int madvise(char *, size_t, int); > > #if defined(__linux__) && \ > (defined(__x86_64__) || defined(__arm__) || defined(__aarch64__) \ > - || defined(__powerpc64__)) > + || defined(__powerpc64__) || defined(__riscv)) > /* Use 2 MiB alignment so transparent hugepages can be used by KVM. > Valgrind does not support alignments larger than 1 MiB, > therefore we need special code which handles running on Valgrind. */ > -- > 2.27.0 >
On 24.09.25 07:18, liu.xuemei1@zte.com.cn wrote: > From: Xuemei Liu <liu.xuemei1@zte.com.cn> > > Similar to other architectures (e.g., x86_64, aarch64), utilizing THP on RISC-V > KVM requires 2MiB-aligned memory blocks. > > Signed-off-by: Xuemei Liu <liu.xuemei1@zte.com.cn> > --- > include/qemu/osdep.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h > index 1b38cb7e45..6de6c0c4e5 100644 > --- a/include/qemu/osdep.h > +++ b/include/qemu/osdep.h > @@ -561,7 +561,7 @@ int madvise(char *, size_t, int); > > #if defined(__linux__) && \ > (defined(__x86_64__) || defined(__arm__) || defined(__aarch64__) \ > - || defined(__powerpc64__)) > + || defined(__powerpc64__) || defined(__riscv)) > /* Use 2 MiB alignment so transparent hugepages can be used by KVM. > Valgrind does not support alignments larger than 1 MiB, > therefore we need special code which handles running on Valgrind. */ Reviewed-by: David Hildenbrand <david@redhat.com> -- Cheers David / dhildenb
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