Reset pasid cache when system level reset, for RID_PASID, its vtd_as is
allocated by PCI system and never removed, just mark pasid cache invalid.

As we already have vtd_pasid_cache_sync_locked() to handle pasid cache
invalidation, reuse it to do pasid cache invalidation at system reset
level.

Currently only IOMMUFD backed VFIO device caches pasid entry, so we don't
need to care about emulated device.

Signed-off-by: Yi Liu <yi.l.liu@intel.com>
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
---
 hw/i386/intel_iommu.c | 15 ++++++++++++++-
 hw/i386/trace-events  |  1 +
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 24061f6dc6..a6638e13be 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -85,6 +85,18 @@ struct vtd_iotlb_key {
 
 static void vtd_address_space_refresh_all(IntelIOMMUState *s);
 static void vtd_address_space_unmap(VTDAddressSpace *as, IOMMUNotifier *n);
+static void vtd_pasid_cache_sync_locked(gpointer key, gpointer value,
+                                        gpointer user_data);
+
+static void vtd_pasid_cache_reset_locked(IntelIOMMUState *s)
+{
+    VTDPASIDCacheInfo pc_info = { .reset = true };
+
+    trace_vtd_pasid_cache_reset();
+    g_hash_table_foreach(s->vtd_address_spaces,
+                         vtd_pasid_cache_sync_locked, &pc_info);
+}
+
 
 static void vtd_panic_require_caching_mode(void)
 {
@@ -390,6 +402,7 @@ static void vtd_reset_caches(IntelIOMMUState *s)
     vtd_iommu_lock(s);
     vtd_reset_iotlb_locked(s);
     vtd_reset_context_cache_locked(s);
+    vtd_pasid_cache_reset_locked(s);
     vtd_iommu_unlock(s);
 }
 
@@ -3115,7 +3128,7 @@ static void vtd_pasid_cache_sync_locked(gpointer key, gpointer value,
     /* non-RID_PASID isn't supported yet */
     assert(vtd_as->pasid == PCI_NO_PASID);
 
-    if (vtd_dev_get_pe_from_pasid(vtd_as, &pe)) {
+    if (pc_info->reset || vtd_dev_get_pe_from_pasid(vtd_as, &pe)) {
         /*
          * No valid pasid entry in guest memory. e.g. pasid entry was modified
          * to be either all-zero or non-present. Either case means existing
diff --git a/hw/i386/trace-events b/hw/i386/trace-events
index 298addb24d..b704f4f90c 100644
--- a/hw/i386/trace-events
+++ b/hw/i386/trace-events
@@ -24,6 +24,7 @@ vtd_inv_qi_head(uint16_t head) "read head %d"
 vtd_inv_qi_tail(uint16_t head) "write tail %d"
 vtd_inv_qi_fetch(void) ""
 vtd_context_cache_reset(void) ""
+vtd_pasid_cache_reset(void) ""
 vtd_inv_desc_pasid_cache_gsi(void) ""
 vtd_inv_desc_pasid_cache_dsi(uint16_t domain) "Domain selective PC invalidation domain 0x%"PRIx16
 vtd_inv_desc_pasid_cache_psi(uint16_t domain, uint32_t pasid) "PASID selective PC invalidation domain 0x%"PRIx16" pasid 0x%"PRIx32
-- 
2.47.1

On 2025/9/18 16:57, Zhenzhong Duan wrote:
> Reset pasid cache when system level reset, for RID_PASID, its vtd_as is
> allocated by PCI system and never removed, just mark pasid cache invalid.
> 
> As we already have vtd_pasid_cache_sync_locked() to handle pasid cache
> invalidation, reuse it to do pasid cache invalidation at system reset
> level.
> 
> Currently only IOMMUFD backed VFIO device caches pasid entry, so we don't
> need to care about emulated device.
> 
> Signed-off-by: Yi Liu <yi.l.liu@intel.com>
> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
> ---
>   hw/i386/intel_iommu.c | 15 ++++++++++++++-
>   hw/i386/trace-events  |  1 +
>   2 files changed, 15 insertions(+), 1 deletion(-)
> 
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index 24061f6dc6..a6638e13be 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -85,6 +85,18 @@ struct vtd_iotlb_key {
>   
>   static void vtd_address_space_refresh_all(IntelIOMMUState *s);
>   static void vtd_address_space_unmap(VTDAddressSpace *as, IOMMUNotifier *n);
> +static void vtd_pasid_cache_sync_locked(gpointer key, gpointer value,
> +                                        gpointer user_data);
> +
> +static void vtd_pasid_cache_reset_locked(IntelIOMMUState *s)
> +{
> +    VTDPASIDCacheInfo pc_info = { .reset = true };
> +
> +    trace_vtd_pasid_cache_reset();
> +    g_hash_table_foreach(s->vtd_address_spaces,
> +                         vtd_pasid_cache_sync_locked, &pc_info);
> +}
> +
>   
>   static void vtd_panic_require_caching_mode(void)
>   {
> @@ -390,6 +402,7 @@ static void vtd_reset_caches(IntelIOMMUState *s)
>       vtd_iommu_lock(s);
>       vtd_reset_iotlb_locked(s);
>       vtd_reset_context_cache_locked(s);
> +    vtd_pasid_cache_reset_locked(s);
>       vtd_iommu_unlock(s);
>   }
>   
> @@ -3115,7 +3128,7 @@ static void vtd_pasid_cache_sync_locked(gpointer key, gpointer value,
>       /* non-RID_PASID isn't supported yet */
>       assert(vtd_as->pasid == PCI_NO_PASID);
>   
> -    if (vtd_dev_get_pe_from_pasid(vtd_as, &pe)) {
> +    if (pc_info->reset || vtd_dev_get_pe_from_pasid(vtd_as, &pe)) {
>           /*
>            * No valid pasid entry in guest memory. e.g. pasid entry was modified
>            * to be either all-zero or non-present. Either case means existing

do you want to update the comment accordingly? otherwise, the patch
looks good.

Reviewed-by: Yi Liu <yi.l.liu@intel.com>

Regards,
Yi Liu

>-----Original Message-----
>From: Liu, Yi L <yi.l.liu@intel.com>
>Subject: Re: [PATCH v6 13/22] intel_iommu: Reset pasid cache when system
>level reset
>
>On 2025/9/18 16:57, Zhenzhong Duan wrote:
>> Reset pasid cache when system level reset, for RID_PASID, its vtd_as is
>> allocated by PCI system and never removed, just mark pasid cache invalid.
>>
>> As we already have vtd_pasid_cache_sync_locked() to handle pasid cache
>> invalidation, reuse it to do pasid cache invalidation at system reset
>> level.
>>
>> Currently only IOMMUFD backed VFIO device caches pasid entry, so we
>don't
>> need to care about emulated device.
>>
>> Signed-off-by: Yi Liu <yi.l.liu@intel.com>
>> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
>> ---
>>   hw/i386/intel_iommu.c | 15 ++++++++++++++-
>>   hw/i386/trace-events  |  1 +
>>   2 files changed, 15 insertions(+), 1 deletion(-)
>>
>> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
>> index 24061f6dc6..a6638e13be 100644
>> --- a/hw/i386/intel_iommu.c
>> +++ b/hw/i386/intel_iommu.c
>> @@ -85,6 +85,18 @@ struct vtd_iotlb_key {
>>
>>   static void vtd_address_space_refresh_all(IntelIOMMUState *s);
>>   static void vtd_address_space_unmap(VTDAddressSpace *as,
>IOMMUNotifier *n);
>> +static void vtd_pasid_cache_sync_locked(gpointer key, gpointer value,
>> +                                        gpointer user_data);
>> +
>> +static void vtd_pasid_cache_reset_locked(IntelIOMMUState *s)
>> +{
>> +    VTDPASIDCacheInfo pc_info = { .reset = true };
>> +
>> +    trace_vtd_pasid_cache_reset();
>> +    g_hash_table_foreach(s->vtd_address_spaces,
>> +                         vtd_pasid_cache_sync_locked, &pc_info);
>> +}
>> +
>>
>>   static void vtd_panic_require_caching_mode(void)
>>   {
>> @@ -390,6 +402,7 @@ static void vtd_reset_caches(IntelIOMMUState *s)
>>       vtd_iommu_lock(s);
>>       vtd_reset_iotlb_locked(s);
>>       vtd_reset_context_cache_locked(s);
>> +    vtd_pasid_cache_reset_locked(s);
>>       vtd_iommu_unlock(s);
>>   }
>>
>> @@ -3115,7 +3128,7 @@ static void
>vtd_pasid_cache_sync_locked(gpointer key, gpointer value,
>>       /* non-RID_PASID isn't supported yet */
>>       assert(vtd_as->pasid == PCI_NO_PASID);
>>
>> -    if (vtd_dev_get_pe_from_pasid(vtd_as, &pe)) {
>> +    if (pc_info->reset || vtd_dev_get_pe_from_pasid(vtd_as, &pe)) {
>>           /*
>>            * No valid pasid entry in guest memory. e.g. pasid entry was
>modified
>>            * to be either all-zero or non-present. Either case means
>existing
>
>do you want to update the comment accordingly? otherwise, the patch
>looks good.

Sure, will do.

Thanks
Zhenzhong

>
>Reviewed-by: Yi Liu <yi.l.liu@intel.com>
>
>Regards,
>Yi Liu