AST2700 does not implement a PCIe Root Device; each RC exposes a single
PCIe Root Port at devfn 0:0.0.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
 hw/pci-host/aspeed_pcie.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/hw/pci-host/aspeed_pcie.c b/hw/pci-host/aspeed_pcie.c
index b7ae47f9b2..53ea544d59 100644
--- a/hw/pci-host/aspeed_pcie.c
+++ b/hw/pci-host/aspeed_pcie.c
@@ -823,6 +823,8 @@ static void aspeed_2700_pcie_cfg_class_init(ObjectClass *klass,
     apc->nr_regs = 0x100 >> 2;
     apc->rc_msi_addr = 0x000000F0;
     apc->rc_bus_nr = 0;
+    apc->rc_has_rd = false;
+    apc->rc_rp_addr = PCI_DEVFN(0, 0);
 }
 
 static const TypeInfo aspeed_2700_pcie_cfg_info = {
-- 
2.43.0