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[PATCH v1 3/6] hw/arm/aspeed: Add AST1700 IO expander

Kane Chen via posted 6 patches 1 month, 4 weeks ago
Maintainers: "Cédric Le Goater" <clg@kaod.org>, Peter Maydell <peter.maydell@linaro.org>, Steven Lee <steven_lee@aspeedtech.com>, Troy Lee <leetroy@gmail.com>, Jamin Lin <jamin_lin@aspeedtech.com>, Andrew Jeffery <andrew@codeconstruct.com.au>, Joel Stanley <joel@jms.id.au>
[PATCH v1 3/6] hw/arm/aspeed: Add AST1700 IO expander
Posted by Kane Chen via 1 month, 4 weeks ago 
From: Kane-Chen-AS <kane_chen@aspeedtech.com>

AST27x0 machines can carry up to two AST1700-based IO expander boards.
This change introduces a lightweight AST1700 SoC container and maps two
separate LTPI IO windows for those expanders.

Signed-off-by: Kane-Chen-AS <kane_chen@aspeedtech.com>
---
 include/hw/arm/aspeed_soc.h | 20 ++++++++++++++++++--
 hw/arm/aspeed_ast27x0.c     | 17 ++++++++++++-----
 2 files changed, 30 insertions(+), 7 deletions(-)

diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index 72eefb0327..648c8d5c00 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -52,6 +52,21 @@
 #define ASPEED_JTAG_NUM  2
 #define ASPEED_IOEXP_NUM 2
 
+typedef struct {
+    MemoryRegion *memory;
+    MemoryRegion container;
+    AddressSpace dram_as;
+
+    AspeedSMCState spi;
+    AspeedADCState adc;
+    AspeedSCUState scu;
+    AspeedGPIOState gpio;
+    AspeedI2CState i2c;
+    AspeedI3CState i3c;
+    SerialMM uart;
+    AspeedWDTState wdt[ASPEED_WDTS_NUM];
+} AspeedAST1700SoCState;
+
 struct AspeedSoCState {
     DeviceState parent;
 
@@ -102,10 +117,10 @@ struct AspeedSoCState {
     UnimplementedDeviceState espi;
     UnimplementedDeviceState udc;
     UnimplementedDeviceState sgpiom;
-    UnimplementedDeviceState ltpi;
     UnimplementedDeviceState jtag[ASPEED_JTAG_NUM];
     AspeedAPB2OPBState fsi[2];
     AspeedLTPIState ltpi_ctrl[ASPEED_IOEXP_NUM];
+    AspeedAST1700SoCState ioexp[ASPEED_IOEXP_NUM];
     uint8_t ioexp_num;
 };
 
@@ -206,7 +221,8 @@ enum {
     ASPEED_DEV_IOMEM,
     ASPEED_DEV_IOMEM0,
     ASPEED_DEV_IOMEM1,
-    ASPEED_DEV_LTPI,
+    ASPEED_DEV_LTPI_IO0,
+    ASPEED_DEV_LTPI_IO1,
     ASPEED_DEV_UART0,
     ASPEED_DEV_UART1,
     ASPEED_DEV_UART2,
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index 3f93554027..2e180c8cc5 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -83,8 +83,9 @@ static const hwaddr aspeed_soc_ast2700_memmap[] = {
     [ASPEED_DEV_LTPI_CTRL1] =  0x14C34000,
     [ASPEED_DEV_LTPI_CTRL2] =  0x14C35000,
     [ASPEED_DEV_WDT]       =  0x14C37000,
+    [ASPEED_DEV_LTPI_IO0]  =  0x30000000,
+    [ASPEED_DEV_LTPI_IO1]  =  0x50000000,
     [ASPEED_DEV_SPI_BOOT]  =  0x100000000,
-    [ASPEED_DEV_LTPI]      =  0x300000000,
     [ASPEED_DEV_SDRAM]     =  0x400000000,
 };
 
@@ -523,7 +524,9 @@ static void aspeed_soc_ast2700_init(Object *obj)
     object_initialize_child(obj, "hace", &s->hace, typename);
     object_initialize_child(obj, "dpmcu", &s->dpmcu,
                             TYPE_UNIMPLEMENTED_DEVICE);
-    object_initialize_child(obj, "ltpi", &s->ltpi,
+    object_initialize_child(obj, "ltpi0", &s->ioexp[0],
+                            TYPE_UNIMPLEMENTED_DEVICE);
+    object_initialize_child(obj, "ltpi1", &s->ioexp[1],
                             TYPE_UNIMPLEMENTED_DEVICE);
     object_initialize_child(obj, "iomem", &s->iomem,
                             TYPE_UNIMPLEMENTED_DEVICE);
@@ -968,9 +971,13 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)
                                   "aspeed.dpmcu",
                                   sc->memmap[ASPEED_DEV_DPMCU],
                                   AST2700_SOC_DPMCU_SIZE);
-    aspeed_mmio_map_unimplemented(s, SYS_BUS_DEVICE(&s->ltpi),
-                                  "aspeed.ltpi",
-                                  sc->memmap[ASPEED_DEV_LTPI],
+    aspeed_mmio_map_unimplemented(s, SYS_BUS_DEVICE(&s->ioexp[0]),
+                                  "aspeed.ltpi.0",
+                                  sc->memmap[ASPEED_DEV_LTPI_IO0],
+                                  AST2700_SOC_LTPI_SIZE);
+    aspeed_mmio_map_unimplemented(s, SYS_BUS_DEVICE(&s->ioexp[1]),
+                                  "aspeed.ltpi.1",
+                                  sc->memmap[ASPEED_DEV_LTPI_IO1],
                                   AST2700_SOC_LTPI_SIZE);
     aspeed_mmio_map_unimplemented(s, SYS_BUS_DEVICE(&s->iomem),
                                   "aspeed.io",
-- 
2.43.0
Re: [SPAM] [PATCH v1 3/6] hw/arm/aspeed: Add AST1700 IO expander
Posted by Cédric Le Goater 1 month, 4 weeks ago 
On 9/17/25 03:31, Kane Chen wrote:
> From: Kane-Chen-AS <kane_chen@aspeedtech.com>
> 
> AST27x0 machines can carry up to two AST1700-based IO expander boards.
> This change introduces a lightweight AST1700 SoC container and maps two
> separate LTPI IO windows for those expanders.

We will need more details on the new SoC.

> 
> Signed-off-by: Kane-Chen-AS <kane_chen@aspeedtech.com>
> ---
>   include/hw/arm/aspeed_soc.h | 20 ++++++++++++++++++--
>   hw/arm/aspeed_ast27x0.c     | 17 ++++++++++++-----
>   2 files changed, 30 insertions(+), 7 deletions(-)
> 
> diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
> index 72eefb0327..648c8d5c00 100644
> --- a/include/hw/arm/aspeed_soc.h
> +++ b/include/hw/arm/aspeed_soc.h
> @@ -52,6 +52,21 @@
>   #define ASPEED_JTAG_NUM  2
>   #define ASPEED_IOEXP_NUM 2
>   
> +typedef struct {
> +    MemoryRegion *memory;
> +    MemoryRegion container;
> +    AddressSpace dram_as;
> +
> +    AspeedSMCState spi;
> +    AspeedADCState adc;
> +    AspeedSCUState scu;
> +    AspeedGPIOState gpio;
> +    AspeedI2CState i2c;
> +    AspeedI3CState i3c;
> +    SerialMM uart;
> +    AspeedWDTState wdt[ASPEED_WDTS_NUM];
> +} AspeedAST1700SoCState;
> +

This is introducing a new SoC, which is fine.


>   struct AspeedSoCState {
>       DeviceState parent;
>   
> @@ -102,10 +117,10 @@ struct AspeedSoCState {
>       UnimplementedDeviceState espi;
>       UnimplementedDeviceState udc;
>       UnimplementedDeviceState sgpiom;
> -    UnimplementedDeviceState ltpi;
>       UnimplementedDeviceState jtag[ASPEED_JTAG_NUM];
>       AspeedAPB2OPBState fsi[2];
>       AspeedLTPIState ltpi_ctrl[ASPEED_IOEXP_NUM];
> +    AspeedAST1700SoCState ioexp[ASPEED_IOEXP_NUM];
>       uint8_t ioexp_num;
>   };
>   
> @@ -206,7 +221,8 @@ enum {
>       ASPEED_DEV_IOMEM,
>       ASPEED_DEV_IOMEM0,
>       ASPEED_DEV_IOMEM1,
> -    ASPEED_DEV_LTPI,
> +    ASPEED_DEV_LTPI_IO0,
> +    ASPEED_DEV_LTPI_IO1,
>       ASPEED_DEV_UART0,
>       ASPEED_DEV_UART1,
>       ASPEED_DEV_UART2,
> diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
> index 3f93554027..2e180c8cc5 100644
> --- a/hw/arm/aspeed_ast27x0.c
> +++ b/hw/arm/aspeed_ast27x0.c
> @@ -83,8 +83,9 @@ static const hwaddr aspeed_soc_ast2700_memmap[] = {
>       [ASPEED_DEV_LTPI_CTRL1] =  0x14C34000,
>       [ASPEED_DEV_LTPI_CTRL2] =  0x14C35000,
>       [ASPEED_DEV_WDT]       =  0x14C37000,
> +    [ASPEED_DEV_LTPI_IO0]  =  0x30000000,
> +    [ASPEED_DEV_LTPI_IO1]  =  0x50000000,
>       [ASPEED_DEV_SPI_BOOT]  =  0x100000000,
> -    [ASPEED_DEV_LTPI]      =  0x300000000,
>       [ASPEED_DEV_SDRAM]     =  0x400000000,
>   };
>   
> @@ -523,7 +524,9 @@ static void aspeed_soc_ast2700_init(Object *obj)
>       object_initialize_child(obj, "hace", &s->hace, typename);
>       object_initialize_child(obj, "dpmcu", &s->dpmcu,
>                               TYPE_UNIMPLEMENTED_DEVICE);
> -    object_initialize_child(obj, "ltpi", &s->ltpi,
> +    object_initialize_child(obj, "ltpi0", &s->ioexp[0],
> +                            TYPE_UNIMPLEMENTED_DEVICE);
> +    object_initialize_child(obj, "ltpi1", &s->ioexp[1],
>                               TYPE_UNIMPLEMENTED_DEVICE);



However, please reimplement all the class handlers for the new SoC.

Thanks,

C.





>       object_initialize_child(obj, "iomem", &s->iomem,
>                               TYPE_UNIMPLEMENTED_DEVICE);
> @@ -968,9 +971,13 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)
>                                     "aspeed.dpmcu",
>                                     sc->memmap[ASPEED_DEV_DPMCU],
>                                     AST2700_SOC_DPMCU_SIZE);
> -    aspeed_mmio_map_unimplemented(s, SYS_BUS_DEVICE(&s->ltpi),
> -                                  "aspeed.ltpi",
> -                                  sc->memmap[ASPEED_DEV_LTPI],
> +    aspeed_mmio_map_unimplemented(s, SYS_BUS_DEVICE(&s->ioexp[0]),
> +                                  "aspeed.ltpi.0",
> +                                  sc->memmap[ASPEED_DEV_LTPI_IO0],
> +                                  AST2700_SOC_LTPI_SIZE);
> +    aspeed_mmio_map_unimplemented(s, SYS_BUS_DEVICE(&s->ioexp[1]),
> +                                  "aspeed.ltpi.1",
> +                                  sc->memmap[ASPEED_DEV_LTPI_IO1],
>                                     AST2700_SOC_LTPI_SIZE);
>       aspeed_mmio_map_unimplemented(s, SYS_BUS_DEVICE(&s->iomem),
>                                     "aspeed.io",

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