Refactor the RPU cluster creation using the VersalMap structure. This
effectively instantiate the RPU GICv2 which was not instantiated before.
Signed-off-by: Luc Michel <luc.michel@amd.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
---
include/hw/arm/xlnx-versal.h | 11 -------
hw/arm/xlnx-versal-virt.c | 1 +
hw/arm/xlnx-versal.c | 60 +++++++++++++++---------------------
3 files changed, 26 insertions(+), 46 deletions(-)
diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
index 984f9f2ccdd..0a91ec7ae36 100644
--- a/include/hw/arm/xlnx-versal.h
+++ b/include/hw/arm/xlnx-versal.h
@@ -12,14 +12,12 @@
#ifndef XLNX_VERSAL_H
#define XLNX_VERSAL_H
#include "hw/sysbus.h"
-#include "hw/cpu/cluster.h"
#include "qom/object.h"
#include "net/can_emu.h"
-#include "target/arm/cpu.h"
#include "hw/arm/xlnx-versal-version.h"
#define TYPE_XLNX_VERSAL_BASE "xlnx-versal-base"
OBJECT_DECLARE_TYPE(Versal, VersalClass, XLNX_VERSAL_BASE)
@@ -50,19 +48,10 @@ struct Versal {
MemoryRegion mr_ddr_ranges[4];
} noc;
struct {
MemoryRegion mr_ocm;
-
- /* Real-time Processing Unit. */
- struct {
- MemoryRegion mr;
- MemoryRegion mr_ps_alias;
-
- CPUClusterState cluster;
- ARMCPU cpu[XLNX_VERSAL_NR_RCPUS];
- } rpu;
} lpd;
struct {
uint32_t clk_25mhz;
uint32_t clk_125mhz;
diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
index 27594f78c8f..5958e712519 100644
--- a/hw/arm/xlnx-versal-virt.c
+++ b/hw/arm/xlnx-versal-virt.c
@@ -22,10 +22,11 @@
#include "hw/qdev-properties.h"
#include "hw/arm/xlnx-versal.h"
#include "hw/arm/boot.h"
#include "target/arm/multiprocessing.h"
#include "qom/object.h"
+#include "target/arm/cpu.h"
#define TYPE_XLNX_VERSAL_VIRT_MACHINE MACHINE_TYPE_NAME("xlnx-versal-virt")
OBJECT_DECLARE_SIMPLE_TYPE(VersalVirt, XLNX_VERSAL_VIRT_MACHINE)
#define XLNX_VERSAL_NUM_OSPI_FLASH 4
diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
index d5dbbe10a6d..54d4b28c7b7 100644
--- a/hw/arm/xlnx-versal.c
+++ b/hw/arm/xlnx-versal.c
@@ -45,10 +45,12 @@
#include "hw/misc/xlnx-versal-crl.h"
#include "hw/intc/arm_gicv3_common.h"
#include "hw/intc/arm_gicv3_its_common.h"
#include "hw/intc/arm_gic.h"
#include "hw/core/split-irq.h"
+#include "target/arm/cpu.h"
+#include "hw/cpu/cluster.h"
#define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72")
#define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f")
#define GEM_REVISION 0x40070106
@@ -105,10 +107,11 @@ typedef struct VersalCpuClusterMap {
enum StartPoweredOffMode start_powered_off;
} VersalCpuClusterMap;
typedef struct VersalMap {
VersalCpuClusterMap apu;
+ VersalCpuClusterMap rpu;
VersalSimplePeriphMap uart[2];
size_t num_uart;
VersalSimplePeriphMap canfd[4];
@@ -224,10 +227,31 @@ static const VersalMap VERSAL_MAP = {
.has_its = true,
.its = 0xf9020000,
},
},
+ .rpu = {
+ .name = "rpu",
+ .cpu_model = ARM_CPU_TYPE_NAME("cortex-r5f"),
+ .num_cluster = 1,
+ .num_core = 2,
+ .qemu_cluster_id = 1,
+ .mp_affinity = {
+ .base = 0x100,
+ .core_shift = ARM_AFF0_SHIFT,
+ .cluster_shift = ARM_AFF1_SHIFT,
+ },
+ .start_powered_off = SPO_ALL,
+ .dtb_expose = false,
+ .gic = {
+ .version = 2,
+ .dist = 0xf9000000,
+ .cpu_iface = 0xf9001000,
+ .num_irq = 192,
+ },
+ },
+
.uart[0] = { 0xff000000, 18 },
.uart[1] = { 0xff010000, 19 },
.num_uart = 2,
.canfd[0] = { 0xff060000, 20 },
@@ -804,39 +828,10 @@ static void versal_create_cpu_cluster(Versal *s, const VersalCpuClusterMap *map)
qemu_fdt_setprop(s->cfg.fdt, "/timer", "compatible",
compatible, sizeof(compatible));
}
}
-static void versal_create_rpu_cpus(Versal *s)
-{
- int i;
-
- object_initialize_child(OBJECT(s), "rpu-cluster", &s->lpd.rpu.cluster,
- TYPE_CPU_CLUSTER);
- qdev_prop_set_uint32(DEVICE(&s->lpd.rpu.cluster), "cluster-id", 1);
-
- for (i = 0; i < ARRAY_SIZE(s->lpd.rpu.cpu); i++) {
- Object *obj;
-
- object_initialize_child(OBJECT(&s->lpd.rpu.cluster),
- "rpu-cpu[*]", &s->lpd.rpu.cpu[i],
- XLNX_VERSAL_RCPU_TYPE);
- obj = OBJECT(&s->lpd.rpu.cpu[i]);
- object_property_set_bool(obj, "start-powered-off", true,
- &error_abort);
-
- object_property_set_int(obj, "mp-affinity", 0x100 | i, &error_abort);
- object_property_set_int(obj, "core-count", ARRAY_SIZE(s->lpd.rpu.cpu),
- &error_abort);
- object_property_set_link(obj, "memory", OBJECT(&s->lpd.rpu.mr),
- &error_abort);
- qdev_realize(DEVICE(obj), NULL, &error_fatal);
- }
-
- qdev_realize(DEVICE(&s->lpd.rpu.cluster), NULL, &error_fatal);
-}
-
static void versal_create_uart(Versal *s,
const VersalSimplePeriphMap *map,
int chardev_idx)
{
DeviceState *dev;
@@ -1638,11 +1633,11 @@ static void versal_realize(DeviceState *dev, Error **errp)
qemu_fdt_setprop_cell(s->cfg.fdt, "/", "interrupt-parent", s->phandle.gic);
qemu_fdt_setprop_cell(s->cfg.fdt, "/", "#size-cells", 0x2);
qemu_fdt_setprop_cell(s->cfg.fdt, "/", "#address-cells", 0x2);
versal_create_cpu_cluster(s, &map->apu);
- versal_create_rpu_cpus(s);
+ versal_create_cpu_cluster(s, &map->rpu);
for (i = 0; i < map->num_uart; i++) {
versal_create_uart(s, &map->uart[i], i);
}
@@ -1694,12 +1689,10 @@ static void versal_realize(DeviceState *dev, Error **errp)
/* Create the On Chip Memory (OCM). */
memory_region_init_ram(&s->lpd.mr_ocm, OBJECT(s), "ocm",
MM_OCM_SIZE, &error_fatal);
memory_region_add_subregion_overlap(&s->mr_ps, MM_OCM, &s->lpd.mr_ocm, 0);
- memory_region_add_subregion_overlap(&s->lpd.rpu.mr, 0,
- &s->lpd.rpu.mr_ps_alias, 0);
}
DeviceState *versal_get_boot_cpu(Versal *s)
{
return DEVICE(versal_get_child_idx(s, "apu-cluster/apu", 0));
@@ -1806,14 +1799,11 @@ int versal_get_num_sdhci(VersalVersion version)
static void versal_base_init(Object *obj)
{
Versal *s = XLNX_VERSAL_BASE(obj);
size_t i, num_can;
- memory_region_init(&s->lpd.rpu.mr, obj, "mr-rpu", UINT64_MAX);
memory_region_init(&s->mr_ps, obj, "mr-ps-switch", UINT64_MAX);
- memory_region_init_alias(&s->lpd.rpu.mr_ps_alias, OBJECT(s),
- "mr-rpu-ps-alias", &s->mr_ps, 0, UINT64_MAX);
s->intc = g_array_new(false, false, sizeof(DeviceState *));
num_can = versal_get_map(s)->num_canfd;
s->cfg.canbus = g_new0(CanBusState *, num_can);
--
2.50.1