target/riscv: Implement SMSDID and SMMPT extension

[RFC PATCH 5/5] target/riscv: Enable SMMPT extension

Posted by LIU Zhiwei 2 weeks, 5 days ago

Co-authored-by: Huang Tao <eric.huang@linux.alibaba.com>
Co-authored-by: TANG Tiancheng <lyndra@linux.alibaba.com>
Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
---
 target/riscv/cpu.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index d055ddf462..eea0942cf5 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -204,7 +204,9 @@ const RISCVIsaExtData isa_edata_arr[] = {
     ISA_EXT_DATA_ENTRY(smdbltrp, PRIV_VERSION_1_13_0, ext_smdbltrp),
     ISA_EXT_DATA_ENTRY(smepmp, PRIV_VERSION_1_12_0, ext_smepmp),
     ISA_EXT_DATA_ENTRY(smrnmi, PRIV_VERSION_1_12_0, ext_smrnmi),
+    ISA_EXT_DATA_ENTRY(smsdid, PRIV_VERSION_1_13_0, ext_smsdid),
     ISA_EXT_DATA_ENTRY(smmpm, PRIV_VERSION_1_13_0, ext_smmpm),
+    ISA_EXT_DATA_ENTRY(smmpt, PRIV_VERSION_1_13_0, ext_smmpt),
     ISA_EXT_DATA_ENTRY(smnpm, PRIV_VERSION_1_13_0, ext_smnpm),
     ISA_EXT_DATA_ENTRY(smstateen, PRIV_VERSION_1_12_0, ext_smstateen),
     ISA_EXT_DATA_ENTRY(ssaia, PRIV_VERSION_1_12_0, ext_ssaia),
@@ -1279,6 +1281,8 @@ const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = {
     MULTI_EXT_CFG_BOOL("smmpm", ext_smmpm, false),
     MULTI_EXT_CFG_BOOL("smnpm", ext_smnpm, false),
     MULTI_EXT_CFG_BOOL("smstateen", ext_smstateen, false),
+    MULTI_EXT_CFG_BOOL("smsdid", ext_smsdid, false),
+    MULTI_EXT_CFG_BOOL("smmpt", ext_smmpt, false),
     MULTI_EXT_CFG_BOOL("ssaia", ext_ssaia, false),
     MULTI_EXT_CFG_BOOL("ssdbltrp", ext_ssdbltrp, false),
     MULTI_EXT_CFG_BOOL("svade", ext_svade, false),
-- 
2.25.1

Re: [RFC PATCH 5/5] target/riscv: Enable SMMPT extension

Posted by Daniel Henrique Barboza 1 week, 4 days ago


On 9/9/25 10:25 AM, LIU Zhiwei wrote:
> Co-authored-by: Huang Tao <eric.huang@linux.alibaba.com>
> Co-authored-by: TANG Tiancheng <lyndra@linux.alibaba.com>
> Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
> ---
>   target/riscv/cpu.c | 4 ++++
>   1 file changed, 4 insertions(+)
> 
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index d055ddf462..eea0942cf5 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -204,7 +204,9 @@ const RISCVIsaExtData isa_edata_arr[] = {
>       ISA_EXT_DATA_ENTRY(smdbltrp, PRIV_VERSION_1_13_0, ext_smdbltrp),
>       ISA_EXT_DATA_ENTRY(smepmp, PRIV_VERSION_1_12_0, ext_smepmp),
>       ISA_EXT_DATA_ENTRY(smrnmi, PRIV_VERSION_1_12_0, ext_smrnmi),
> +    ISA_EXT_DATA_ENTRY(smsdid, PRIV_VERSION_1_13_0, ext_smsdid),
>       ISA_EXT_DATA_ENTRY(smmpm, PRIV_VERSION_1_13_0, ext_smmpm),
> +    ISA_EXT_DATA_ENTRY(smmpt, PRIV_VERSION_1_13_0, ext_smmpt),

smmpt should be before smsdid. The ordering of Z extensions has that weird priority
ordering, but S extensions should be ordered alphabetically.

Yes, there are some extensions that are already out of order (smmpm, smnpm ...). We'll
have to patch them back to order in a separated patch, but for now let's not add to the
problem hehe


Thanks,

Daniel

>       ISA_EXT_DATA_ENTRY(smnpm, PRIV_VERSION_1_13_0, ext_smnpm),
>       ISA_EXT_DATA_ENTRY(smstateen, PRIV_VERSION_1_12_0, ext_smstateen),
>       ISA_EXT_DATA_ENTRY(ssaia, PRIV_VERSION_1_12_0, ext_ssaia),
> @@ -1279,6 +1281,8 @@ const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = {
>       MULTI_EXT_CFG_BOOL("smmpm", ext_smmpm, false),
>       MULTI_EXT_CFG_BOOL("smnpm", ext_smnpm, false),
>       MULTI_EXT_CFG_BOOL("smstateen", ext_smstateen, false),
> +    MULTI_EXT_CFG_BOOL("smsdid", ext_smsdid, false),
> +    MULTI_EXT_CFG_BOOL("smmpt", ext_smmpt, false),
>       MULTI_EXT_CFG_BOOL("ssaia", ext_ssaia, false),
>       MULTI_EXT_CFG_BOOL("ssdbltrp", ext_ssdbltrp, false),
>       MULTI_EXT_CFG_BOOL("svade", ext_svade, false),

Re: [RFC PATCH 5/5] target/riscv: Enable SMMPT extension

Posted by LIU Zhiwei 1 week, 3 days ago

On 9/17/25 7:41 PM, Daniel Henrique Barboza wrote:
>
>
> On 9/9/25 10:25 AM, LIU Zhiwei wrote:
>> Co-authored-by: Huang Tao <eric.huang@linux.alibaba.com>
>> Co-authored-by: TANG Tiancheng <lyndra@linux.alibaba.com>
>> Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
>> ---
>>   target/riscv/cpu.c | 4 ++++
>>   1 file changed, 4 insertions(+)
>>
>> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
>> index d055ddf462..eea0942cf5 100644
>> --- a/target/riscv/cpu.c
>> +++ b/target/riscv/cpu.c
>> @@ -204,7 +204,9 @@ const RISCVIsaExtData isa_edata_arr[] = {
>>       ISA_EXT_DATA_ENTRY(smdbltrp, PRIV_VERSION_1_13_0, ext_smdbltrp),
>>       ISA_EXT_DATA_ENTRY(smepmp, PRIV_VERSION_1_12_0, ext_smepmp),
>>       ISA_EXT_DATA_ENTRY(smrnmi, PRIV_VERSION_1_12_0, ext_smrnmi),
>> +    ISA_EXT_DATA_ENTRY(smsdid, PRIV_VERSION_1_13_0, ext_smsdid),
>>       ISA_EXT_DATA_ENTRY(smmpm, PRIV_VERSION_1_13_0, ext_smmpm),
>> +    ISA_EXT_DATA_ENTRY(smmpt, PRIV_VERSION_1_13_0, ext_smmpt),
>
> smmpt should be before smsdid. 
OK. I miss it.  I will also make it a experiment extension.

Thanks,

Zhiwei

> The ordering of Z extensions has that weird priority
> ordering, but S extensions should be ordered alphabetically.
>
> Yes, there are some extensions that are already out of order (smmpm, 
> smnpm ...). We'll
> have to patch them back to order in a separated patch, but for now 
> let's not add to the
> problem hehe
>
>
> Thanks,
>
> Daniel
>
>>       ISA_EXT_DATA_ENTRY(smnpm, PRIV_VERSION_1_13_0, ext_smnpm),
>>       ISA_EXT_DATA_ENTRY(smstateen, PRIV_VERSION_1_12_0, ext_smstateen),
>>       ISA_EXT_DATA_ENTRY(ssaia, PRIV_VERSION_1_12_0, ext_ssaia),
>> @@ -1279,6 +1281,8 @@ const RISCVCPUMultiExtConfig 
>> riscv_cpu_extensions[] = {
>>       MULTI_EXT_CFG_BOOL("smmpm", ext_smmpm, false),
>>       MULTI_EXT_CFG_BOOL("smnpm", ext_smnpm, false),
>>       MULTI_EXT_CFG_BOOL("smstateen", ext_smstateen, false),
>> +    MULTI_EXT_CFG_BOOL("smsdid", ext_smsdid, false),
>> +    MULTI_EXT_CFG_BOOL("smmpt", ext_smmpt, false),
>>       MULTI_EXT_CFG_BOOL("ssaia", ext_ssaia, false),
>>       MULTI_EXT_CFG_BOOL("ssdbltrp", ext_ssdbltrp, false),
>>       MULTI_EXT_CFG_BOOL("svade", ext_svade, false),
>

[RFC PATCH 1/5] target/riscv: Add basic definitions and CSRs for SMMPT
[RFC PATCH 2/5] target/riscv: Implement core SMMPT lookup logic
[RFC PATCH 3/5] target/riscv: Integrate SMMPT checks into MMU and TLB fill
[RFC PATCH 4/5] target/riscv: Implement SMMPT fence instructions
[RFC PATCH 5/5] target/riscv: Enable SMMPT extension