Improvement to QEMU:
These changes enhance QEMU by adding emulation support for a new piece
of hardware, the Nuvoton PCIe root complex, which is prevalent
in both NPCM7xx and NPCM8XX Board SoCs.

Impact (Before/After):
- Before: QEMU lacked a specific model for the Nuvoton PCIe host.
Emulating platforms using this SoC meant PCIe capabilities were either
missing or inaccurate.

- After: QEMU can now model the fundamental aspects of the
PCIe host controller. Virtual PCIe devices can be attached to emulated
NPCM7xx and NPCM8xx machines, and the guest OS can interact with them
through a more faithful representation of the on-chip PCIe hardware.

Signed-off-by: Yubin Zou <yubinz@google.com>
---
Hao Wu (1):
      hw/arm: Add PCIERC to NPCM7xx SoC

Titus Rwantare (6):
      hw/pci-host: implement Nuvoton PCIE Root Complex stub
      hw/pci-host: add basic Nuvoton PCIe window support
      hw/arm: attach PCIe root complex to npmcm8xx
      hw/pci-host: add Nuvoton PCIe root port
      hw/pci-host: enable MSI on npcm PCIe root complex
      hw/pci-host: rework Nuvoton PCIe windowing and memory regions

 hw/arm/Kconfig                    |   4 +-
 hw/arm/npcm7xx.c                  |  10 +
 hw/arm/npcm8xx.c                  |  12 +-
 hw/pci-host/Kconfig               |   4 +
 hw/pci-host/meson.build           |   1 +
 hw/pci-host/npcm_pcierc.c         | 587 ++++++++++++++++++++++++++++++++++++++
 hw/pci-host/trace-events          |   4 +
 include/hw/arm/npcm7xx.h          |   4 +-
 include/hw/arm/npcm8xx.h          |   2 +
 include/hw/pci-host/npcm_pcierc.h | 155 ++++++++++
 10 files changed, 779 insertions(+), 4 deletions(-)
---
base-commit: 6a9fa5ef3230a7d51e0d953a59ee9ef10af705b8
change-id: 20250909-pcie-root-upstream-1eca4ba1c448

Best regards,
-- 
Yubin Zou <yubinz@google.com>

On Tue, 9 Sept 2025 at 23:11, Yubin Zou <yubinz@google.com> wrote:
>
> Improvement to QEMU:
> These changes enhance QEMU by adding emulation support for a new piece
> of hardware, the Nuvoton PCIe root complex, which is prevalent
> in both NPCM7xx and NPCM8XX Board SoCs.
>
> Impact (Before/After):
> - Before: QEMU lacked a specific model for the Nuvoton PCIe host.
> Emulating platforms using this SoC meant PCIe capabilities were either
> missing or inaccurate.
>
> - After: QEMU can now model the fundamental aspects of the
> PCIe host controller. Virtual PCIe devices can be attached to emulated
> NPCM7xx and NPCM8xx machines, and the guest OS can interact with them
> through a more faithful representation of the on-chip PCIe hardware.
>
> Signed-off-by: Yubin Zou <yubinz@google.com>

I have made a few comments about general patch structure,
but reminder that Nuvoton-interested folks should be reviewing
Nuvoton patches for detailed correctness, not assuming that
I will :-)

thanks
-- PMM