[PATCH v4 00/13] target/loongarch: Small enhancement about TLB flush

Bibo Mao posted 13 patches 5 months ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20250906070441.3749413-1-maobibo@loongson.cn
Maintainers: Song Gao <gaosong@loongson.cn>
target/loongarch/cpu-csr.h        |   1 +
target/loongarch/tcg/csr_helper.c |   5 +-
target/loongarch/tcg/tlb_helper.c | 205 ++++++++++++++++++------------
3 files changed, 131 insertions(+), 80 deletions(-)
[PATCH v4 00/13] target/loongarch: Small enhancement about TLB flush
Posted by Bibo Mao 5 months ago
This patch set is continuous MMU enhancement, it is focused on TLB
search, especially on function helper_invtlb_page_asid() and function
helper_invtlb_page_asid_or_g(). The code is similiar with function
loongarch_tlb_search(), one common API loongarch_tlb_search_cb() is
added for these functions.

Also there is optimization with qemu TLB flush, invalidate_tlb_entry()
is used to flush one TLB entry rather than flush all TLB entries.
---
v3 ... v4:
  1. Change return value from bool type to pointer type with function
     loongarch_tlb_search_cb() in newly added patch 8.
  2. Modification with code view comments from Richard

v2 ... v3:
  1. Remove optimization to flush QEMU TLB with MMU_USER_IDX, now both
     MMU_KERNEL_IDX and MMU_USER_IDX bitmap is added.
  2. Add field RESERVE with register CSR_STLBPS, field RESERVE keeps
     zero when change register CSR_STLBPS.

v1 ... v2:
  1. Add bugfix patch with CSR_STLBPS page size set issue.
  2. Add tlb entry invalidation in function invalidate_tlb(), it can be
     used in both helper_invtlb_page_asid() and function
     helper_invtlb_page_asid_or_g().
---
Bibo Mao (13):
  target/loongarch: Use mmu idx bitmap method when flush TLB
  target/loongarch: Add parameter tlb pointer with fill_tlb_entry
  target/loongarch: Reduce TLB flush with helper_tlbwr
  target/loongarch: Update TLB index selection method
  target/loongarch: Fix page size set issue with CSR_STLBPS
  target/loongarch: Add tlb search callback in loongarch_tlb_search()
  target/loongarch: Add common API loongarch_tlb_search_cb()
  target/loongarch: Change return value type with
    loongarch_tlb_search_cb()
  target/loongarch: Use loongarch_tlb_search_cb in
    helper_invtlb_page_asid_or_g
  target/loongarch: Use loongarch_tlb_search_cb in
    helper_invtlb_page_asid
  target/loongarch: Invalid tlb entry in invalidate_tlb()
  target/loongarch: Only flush one TLB entry in
    helper_invtlb_page_asid_or_g()
  target/loongarch: Only flush one TLB entry in
    helper_invtlb_page_asid()

 target/loongarch/cpu-csr.h        |   1 +
 target/loongarch/tcg/csr_helper.c |   5 +-
 target/loongarch/tcg/tlb_helper.c | 205 ++++++++++++++++++------------
 3 files changed, 131 insertions(+), 80 deletions(-)


base-commit: baa79455fa92984ff0f4b9ae94bed66823177a27
-- 
2.39.3
Re: [PATCH v4 00/13] target/loongarch: Small enhancement about TLB flush
Posted by Bibo Mao 4 months, 3 weeks ago
ping for reviewing with patch 3/8/11  :)

On 2025/9/6 下午3:04, Bibo Mao wrote:
> This patch set is continuous MMU enhancement, it is focused on TLB
> search, especially on function helper_invtlb_page_asid() and function
> helper_invtlb_page_asid_or_g(). The code is similiar with function
> loongarch_tlb_search(), one common API loongarch_tlb_search_cb() is
> added for these functions.
> 
> Also there is optimization with qemu TLB flush, invalidate_tlb_entry()
> is used to flush one TLB entry rather than flush all TLB entries.
> ---
> v3 ... v4:
>    1. Change return value from bool type to pointer type with function
>       loongarch_tlb_search_cb() in newly added patch 8.
>    2. Modification with code view comments from Richard
> 
> v2 ... v3:
>    1. Remove optimization to flush QEMU TLB with MMU_USER_IDX, now both
>       MMU_KERNEL_IDX and MMU_USER_IDX bitmap is added.
>    2. Add field RESERVE with register CSR_STLBPS, field RESERVE keeps
>       zero when change register CSR_STLBPS.
> 
> v1 ... v2:
>    1. Add bugfix patch with CSR_STLBPS page size set issue.
>    2. Add tlb entry invalidation in function invalidate_tlb(), it can be
>       used in both helper_invtlb_page_asid() and function
>       helper_invtlb_page_asid_or_g().
> ---
> Bibo Mao (13):
>    target/loongarch: Use mmu idx bitmap method when flush TLB
>    target/loongarch: Add parameter tlb pointer with fill_tlb_entry
>    target/loongarch: Reduce TLB flush with helper_tlbwr
>    target/loongarch: Update TLB index selection method
>    target/loongarch: Fix page size set issue with CSR_STLBPS
>    target/loongarch: Add tlb search callback in loongarch_tlb_search()
>    target/loongarch: Add common API loongarch_tlb_search_cb()
>    target/loongarch: Change return value type with
>      loongarch_tlb_search_cb()
>    target/loongarch: Use loongarch_tlb_search_cb in
>      helper_invtlb_page_asid_or_g
>    target/loongarch: Use loongarch_tlb_search_cb in
>      helper_invtlb_page_asid
>    target/loongarch: Invalid tlb entry in invalidate_tlb()
>    target/loongarch: Only flush one TLB entry in
>      helper_invtlb_page_asid_or_g()
>    target/loongarch: Only flush one TLB entry in
>      helper_invtlb_page_asid()
> 
>   target/loongarch/cpu-csr.h        |   1 +
>   target/loongarch/tcg/csr_helper.c |   5 +-
>   target/loongarch/tcg/tlb_helper.c | 205 ++++++++++++++++++------------
>   3 files changed, 131 insertions(+), 80 deletions(-)
> 
> 
> base-commit: baa79455fa92984ff0f4b9ae94bed66823177a27
>