hw/intc/riscv_aplic.c | 3 --- 1 file changed, 3 deletions(-)
4.5.7. Rectified inputs, clear interrupt-pending bits
A read of an in_clrip register returns the rectified input values of the
corresponding interrupt sources.
A read of an in_clrip register doesn't should be an active interrupt
source.
A write of an in_clrip register should be an active interrupt source.
Signed-off-by: Yang Jialong <z_bajeer@yeah.net>
---
hw/intc/riscv_aplic.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c
index a1d9fa5085..2583d6d305 100644
--- a/hw/intc/riscv_aplic.c
+++ b/hw/intc/riscv_aplic.c
@@ -204,9 +204,6 @@ static bool riscv_aplic_irq_rectified_val(RISCVAPLICState *aplic,
}
sm = sourcecfg & APLIC_SOURCECFG_SM_MASK;
- if (sm == APLIC_SOURCECFG_SM_INACTIVE) {
- return false;
- }
raw_input = (aplic->state[irq] & APLIC_ISTATE_INPUT) ? 1 : 0;
irq_inverted = (sm == APLIC_SOURCECFG_SM_LEVEL_LOW ||
--
2.34.1
On Thu, Sep 4, 2025 at 4:02 PM Yang Jialong <z_bajeer@yeah.net> wrote:
>
> 4.5.7. Rectified inputs, clear interrupt-pending bits
> A read of an in_clrip register returns the rectified input values of the
> corresponding interrupt sources.
> A read of an in_clrip register doesn't should be an active interrupt
> source.
> A write of an in_clrip register should be an active interrupt source.
Can you please explain in the commit message what is wrong with the
current code and why your patch fixes it
Alistair
>
> Signed-off-by: Yang Jialong <z_bajeer@yeah.net>
> ---
> hw/intc/riscv_aplic.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c
> index a1d9fa5085..2583d6d305 100644
> --- a/hw/intc/riscv_aplic.c
> +++ b/hw/intc/riscv_aplic.c
> @@ -204,9 +204,6 @@ static bool riscv_aplic_irq_rectified_val(RISCVAPLICState *aplic,
> }
>
> sm = sourcecfg & APLIC_SOURCECFG_SM_MASK;
> - if (sm == APLIC_SOURCECFG_SM_INACTIVE) {
> - return false;
> - }
>
> raw_input = (aplic->state[irq] & APLIC_ISTATE_INPUT) ? 1 : 0;
> irq_inverted = (sm == APLIC_SOURCECFG_SM_LEVEL_LOW ||
> --
> 2.34.1
>
>
On Thu, Sep 4, 2025 at 4:02 PM Yang Jialong <z_bajeer@yeah.net> wrote:
>>
>> 4.5.7. Rectified inputs, clear interrupt-pending bits
>> A read of an in_clrip register returns the rectified input values of the
>> corresponding interrupt sources.
>> A read of an in_clrip register doesn't should be an active interrupt
>> source.
>> A write of an in_clrip register should be an active interrupt source.
>
>Can you please explain in the commit message what is wrong with the
>current code and why your patch fixes it
>
I want to read the rectified input value from the register in_clrip.
The specification allows reading 'in_clrip' in any status, but the code
incorrectly prevents access during inactive status.
Thanks.
Yang Jialong
>Alistair
>
>>
>> Signed-off-by: Yang Jialong <z_bajeer@yeah.net>
>> ---
>> hw/intc/riscv_aplic.c | 3 ---
>> 1 file changed, 3 deletions(-)
>>
>> diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c
>> index a1d9fa5085..2583d6d305 100644
>> --- a/hw/intc/riscv_aplic.c
>> +++ b/hw/intc/riscv_aplic.c
>> @@ -204,9 +204,6 @@ static bool riscv_aplic_irq_rectified_val(RISCVAPLICState *aplic,
>> }
>>
>> sm = sourcecfg & APLIC_SOURCECFG_SM_MASK;
>> - if (sm == APLIC_SOURCECFG_SM_INACTIVE) {
>> - return false;
>> - }
>>
>> raw_input = (aplic->state[irq] & APLIC_ISTATE_INPUT) ? 1 : 0;
>> irq_inverted = (sm == APLIC_SOURCECFG_SM_LEVEL_LOW ||
>> --
>> 2.34.1
>>
>>
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