As with parts 1, 2 - some of the changes requested have been made, but not
all.

New features for part 3:
- global registers device model
- boot-serial-test qtest case

Issues not addressed with v2:
* "Add l2vic interrupt controller" - DECLARE_SIMPLE_TYPE, bitops
    - I might also push this and/or QTimer out of this series to simplify
      things a bit.

Brian Cain (8):
  hw/hexagon: Add globalreg model
  hw/hexagon: Add global register tracing
  hw/hexagon: Add machine configs for sysemu
  hw/hexagon: Add v68, sa8775-cdsp0 defs
  hw/hexagon: Modify "Standalone" symbols
  target/hexagon: add build config for softmmu
  hw/hexagon: Define hexagon "virt" machine
  tests/qtest: Add hexagon boot-serial-test

Sid Manning (3):
  hw/hexagon: Add support for cfgbase
  hw/timer: Add QTimer device
  hw/intc: Add l2vic interrupt controller

 MAINTAINERS                                 |   7 +
 docs/devel/hexagon-l2vic.rst                |  59 +++
 docs/devel/index-internals.rst              |   1 +
 configs/devices/hexagon-softmmu/default.mak |   8 +
 configs/targets/hexagon-softmmu.mak         |   7 +
 meson.build                                 |   1 +
 qapi/machine.json                           |   4 +-
 include/hw/hexagon/hexagon.h                | 150 ++++++
 include/hw/hexagon/hexagon_globalreg.h      |  60 +++
 include/hw/hexagon/virt.h                   |  43 ++
 include/hw/intc/l2vic.h                     |  38 ++
 include/hw/timer/qct-qtimer.h               |  85 ++++
 target/hexagon/cpu.h                        |   6 +-
 hw/hexagon/machine_cfg_sa8775_cdsp0.h.inc   |  63 +++
 hw/hexagon/machine_cfg_v66g_1024.h.inc      |  63 +++
 hw/hexagon/machine_cfg_v68n_1024.h.inc      |  64 +++
 hw/hexagon/hexagon_dsp.c                    | 211 ++++++++
 hw/hexagon/hexagon_globalreg.c              | 345 +++++++++++++
 hw/hexagon/virt.c                           | 457 +++++++++++++++++
 hw/intc/l2vic.c                             | 421 ++++++++++++++++
 hw/timer/qct-qtimer.c                       | 520 ++++++++++++++++++++
 system/qdev-monitor.c                       |   2 +-
 target/hexagon/cpu.c                        |   5 +
 target/hexagon/op_helper.c                  |   2 +-
 target/hexagon/translate.c                  |   1 +
 tests/qtest/boot-serial-test.c              |   8 +
 hw/Kconfig                                  |   1 +
 hw/hexagon/Kconfig                          |  16 +
 hw/hexagon/meson.build                      |   7 +
 hw/hexagon/trace-events                     |   3 +
 hw/intc/Kconfig                             |   3 +
 hw/intc/meson.build                         |   2 +
 hw/intc/trace-events                        |   4 +
 hw/meson.build                              |   1 +
 hw/timer/meson.build                        |   2 +
 target/Kconfig                              |   1 +
 target/hexagon/Kconfig                      |   2 +
 target/hexagon/meson.build                  |  12 +-
 tests/qemu-iotests/testenv.py               |   1 +
 tests/qtest/meson.build                     |   2 +
 40 files changed, 2680 insertions(+), 8 deletions(-)
 create mode 100644 docs/devel/hexagon-l2vic.rst
 create mode 100644 configs/devices/hexagon-softmmu/default.mak
 create mode 100644 configs/targets/hexagon-softmmu.mak
 create mode 100644 include/hw/hexagon/hexagon.h
 create mode 100644 include/hw/hexagon/hexagon_globalreg.h
 create mode 100644 include/hw/hexagon/virt.h
 create mode 100644 include/hw/intc/l2vic.h
 create mode 100644 include/hw/timer/qct-qtimer.h
 create mode 100644 hw/hexagon/machine_cfg_sa8775_cdsp0.h.inc
 create mode 100644 hw/hexagon/machine_cfg_v66g_1024.h.inc
 create mode 100644 hw/hexagon/machine_cfg_v68n_1024.h.inc
 create mode 100644 hw/hexagon/hexagon_dsp.c
 create mode 100644 hw/hexagon/hexagon_globalreg.c
 create mode 100644 hw/hexagon/virt.c
 create mode 100644 hw/intc/l2vic.c
 create mode 100644 hw/timer/qct-qtimer.c
 create mode 100644 hw/hexagon/Kconfig
 create mode 100644 hw/hexagon/meson.build
 create mode 100644 hw/hexagon/trace-events
 create mode 100644 target/hexagon/Kconfig

-- 
2.34.1

Hi,

On 2/9/25 05:49, Brian Cain wrote:
> As with parts 1, 2 - some of the changes requested have been made, but not
> all.
> 
> New features for part 3:
> - global registers device model
> - boot-serial-test qtest case
> 
> Issues not addressed with v2:
> * "Add l2vic interrupt controller" - DECLARE_SIMPLE_TYPE, bitops
>      - I might also push this and/or QTimer out of this series to simplify
>        things a bit.
> 
> Brian Cain (8):
>    hw/hexagon: Add globalreg model
>    hw/hexagon: Add global register tracing
>    hw/hexagon: Add machine configs for sysemu
>    hw/hexagon: Add v68, sa8775-cdsp0 defs
>    hw/hexagon: Modify "Standalone" symbols
>    target/hexagon: add build config for softmmu
>    hw/hexagon: Define hexagon "virt" machine
>    tests/qtest: Add hexagon boot-serial-test
> 
> Sid Manning (3):
>    hw/hexagon: Add support for cfgbase
>    hw/timer: Add QTimer device
>    hw/intc: Add l2vic interrupt controller

FYI I have tagged this series to review, but I might not have time the
following 3 weeks.
In doubt, please ping during last week of September to remind me ;)